/******************************************************************************
* [url=home.php?mod=space&uid=288409]@file[/url] main.c
* [url=home.php?mod=space&uid=895143]@version[/url] V1.00
* $Revision: 7 $
* $Date: 19/09/02 3:01p $
* [url=home.php?mod=space&uid=247401]@brief[/url] SPI0 Master driver TM1812 thought MOSI pin.
*
* @note
* Copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
*****************************************************************************/
#include <stdio.h>
#include "M051Series.h"
#include "tm1812.h"
#define PLL_CLOCK 50000000
/* Function prototype declaration */
void SYS_Init(void);
void SPI_Init(void);
/* ------------- */
/* Main function */
/* ------------- */
int main(void)
{
/* Unlock protected registers */
SYS_UnlockReg();
/* Init System, IP clock and multi-function I/O. */
SYS_Init();
/* Lock protected registers */
SYS_LockReg();
/* Configure UART0: 115200, 8-bit word, no parity bit, 1 stop bit. */
UART_Open(UART0, 115200);
/* Init SPI */
SPI_Init();
printf("\n\n");
printf("+--------------------------------------------------------------------+\n");
printf("| M0516 SPI Driver TM1812 Sample Code |\n");
printf("+--------------------------------------------------------------------+\n");
printf("\n");
printf("\nThis sample code demonstrates SPI0 Driver TM1812 thought MOSI.\n");
printf(" SPI0 configuration:\n");
printf(" Master mode; data width 24 bits.\n");
while (1)
{
LED_Test();
}
}
void SYS_Init(void)
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init System Clock */
/*---------------------------------------------------------------------------------------------------------*/
/* Enable external 12MHz XTAL */
CLK_EnableXtalRC(CLK_PWRCON_XTL12M_EN_Msk);
/* Waiting for clock ready */
CLK_WaitClockReady(CLK_CLKSTATUS_XTL12M_STB_Msk);
/* Switch HCLK clock source to HXT and HCLK source divide 1 */
CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HXT, CLK_CLKDIV_HCLK(1));
/* Set core clock as PLL_CLOCK from PLL */
CLK_SetCoreClock(PLL_CLOCK);
/* Select HXT as the clock source of UART0 */
CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART_S_HXT, CLK_CLKDIV_UART(1));
/* Select HCLK as the clock source of SPI0 */
CLK_SetModuleClock(SPI0_MODULE, CLK_CLKSEL1_SPI0_S_HCLK, MODULE_NoMsk);
/* Enable UART peripheral clock */
CLK_EnableModuleClock(UART0_MODULE);
/* Enable SPI0 peripheral clock */
CLK_EnableModuleClock(SPI0_MODULE);
/*---------------------------------------------------------------------------------------------------------*/
/* Init I/O Multi-function */
/*---------------------------------------------------------------------------------------------------------*/
/* Set P3 multi-function pins for UART0 RXD and TXD */
SYS->P3_MFP = SYS_MFP_P30_RXD0 | SYS_MFP_P31_TXD0;
SYS->P1_MFP &= ~(SYS_MFP_P14_Msk | SYS_MFP_P15_Msk | SYS_MFP_P16_Msk | SYS_MFP_P17_Msk);
SYS->P1_MFP |= SYS_MFP_P15_MOSI_0 ;
/* Update System Core Clock */
/* User can use SystemCoreClockUpdate() to calculate SystemCoreClock and CyclesPerUs automatically. */
SystemCoreClockUpdate();
}
void SPI_Init(void)
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init SPI */
/*---------------------------------------------------------------------------------------------------------*/
/* Configure as a master, clock idle low, 24-bit transaction, drive output on falling clock edge and latch input on rising edge. */
/* Set IP clock divider. SPI clock rate = 2.5MHz */
SPI_Open(SPI0, SPI_MASTER, SPI_MODE_0, 24, 2500000);
/* Enable the automatic hardware slave select function. Select the SS pin and configure as low-active. */
SPI_DisableAutoSS(SPI0);
}
/*** (C) COPYRIGHT 2019 Nuvoton Technology Corp. ***/
|