TMS320LF2407如何flash烧写

只看该作者 · 2009-3-17 15:00

TMS320LF2407如何flash烧写

最近在调试2407，使用TI的烧写插件，在烧写时老是提示如下错误，不知道怎么回事，我的cmd文件是按如下配置的，请教高手如何解决
“Data verification failed at address 0x310
Please verify target memory and memory map

Data verification failed at address 0x8000
Please verify target memory and memory map

Data verification failed at address 0x814F
Please verify target memory and memory map

Data verification failed at address 0x803D
Please verify target memory and memory map”

/*********************************************************************
* Filename: example_c.cmd                                            *
*                                                                    *
* Author: David M. Alter, Texas Instruments Inc.                     *
*                                                                    *
* Last Modified: 03/14/01                                            *
*                                                                    *
* Description: C code linker command file for LF2407 DSP.            *
*********************************************************************/

MEMORY
{
  PAGE 0:    /* Program Memory */
    VECS:           org=00000h,   len=00040h   /* internal FLASH */
    FLASH:          org=00044h,   len=07FBCh   /* internal FLASH */
    EXTPROG:        org=08800h,   len=07800h   /* external SRAM  */

  PAGE 1:    /* Data Memory */
    B2:             org=00060h,   len=00020h   /* internal DARAM */
    B0:             org=00200h,   len=00100h   /* internal DARAM */
    B1:             org=00300h,   len=00100h   /* internal DARAM */
    SARAM:          org=00800h,   len=00800h   /* internal SARAM */
    EXTDATA:        org=08000h,   len=08000h   /* external SRAM  */
}

SECTIONS
{
/* Sections generated by the C-compiler */
        .text:  >   FLASH      PAGE 0   /* initialized */
       .cinit:  >   FLASH      PAGE 0   /* initialized */
       .const:  >   B1         PAGE 1   /* initialized */
      .switch:  >   FLASH      PAGE 0   /* initialized */
         .bss:  >   B1         PAGE 1   /* uninitialized */
       .stack:  >   SARAM      PAGE 1   /* uninitialized */
      .sysmem:  >   B1         PAGE 1   /* uninitialized */

/* Sections declared by the user */
      vectors:  >   VECS       PAGE 0   /* initialized */
}