系统配置文件,设置系统PLL工作频率, MAM设置, VIC配置
/* ******************************************************************************** system config files config PLL, MAM, and VIC ******************************************************************************** */ #include <includes.h>
/* ******************************************************************************** name: Config_Clock desc: config the system clock pars: clksrc, fosc, clk rets: err ******************************************************************************** */ INT8U Config_Clock(CLKSEL clksrc, INT32U fosc, INT32U clk) { INT16U i; INT32U clkdiv; if(clk>F72MHZ || fosc>F50MHZ) return 0; //STEP 1 PLLCON_bit.PLLC = 0; PLLFEED = 0xAA; PLLFEED = 0x55; SCS |= 0x20; //while( !(SCS & 0x40) ); //STEP 2 PLLCON_bit.PLLE = 0; PLLFEED = 0xAA; PLLFEED = 0x55; //STEP 3 switch (clksrc) { case RC: CLKSRCSEL_bit.CLKSRC = RC; break; case OSC: CLKSRCSEL_bit.CLKSRC = OSC; break; case RTC: CLKSRCSEL_bit.CLKSRC = RTC; break; default: return 0; } //STEP 5, assume N=1 for(i=6;i<513;i++) { clkdiv = (fosc*(i+1)*2)%clk; if(clkdiv==0) { clkdiv = (fosc*(i+1)*2)/clk; if(clkdiv%2==0) break; } if(i==514) return 0; } PLLCFG_bit.MSEL = i; PLLCFG_bit.NSEL = 0; PLLFEED = 0xAA; PLLFEED = 0x55; //STEP 6 PLLCON_bit.PLLE = 1; PLLFEED = 0xAA; PLLFEED = 0x55; //STEP 7 CCLKCFG = clkdiv-1; //STEP 8 //while(PLLSTAT_bit.PLOCK!=1); //STEP 9 PLLCON_bit.PLLC = 1; PLLFEED = 0xAA; PLLFEED = 0x55; return 1; } /* ******************************************************************************* name: Periphperal_On desc: enable or disable the peripherals to save power pars: peri rets: no *******************************************************************************/ void Peripheral_On(INT32U peri) { PCONP |= 1<<peri; } void Peripheral_Off(INT32U peri) { PCONP &= ~(1<<peri); } /* ******************************************************************************** name: MAM_Config desc: config memory accelerator functions pars: no rets: no ******************************************************************************* */ void MAM_Config(INT32U clk) { //disable Memory acceleratolr MAMCR_bit.MODECTRL = 0; if(clk<F20MHZ) MAMTIM_bit.CYCLES = 1; else if(clk>F20MHZ && clk<F40MHZ) MAMTIM_bit.CYCLES = 2; else if(clk>F40MHZ) MAMTIM_bit.CYCLES = 3; //MAM REG must be disable first MAMCR_bit.MODECTRL= 2; } /* ****************************************************************************** name: VIC_Config desc: config the interrupt mode pars: rets: no ****************************************************************************** */
void VIC_Config(INT8U Mode, INT32U IntNum, INT8U slot, INT32U ISRAddr) { INT32U * pADR; if(Mode==2) VICINTSELECT |= 1<<IntNum; //config as FIQ if(Mode==1) //config as IRQ { pADR = (INT32U *)(BaseIRQPRO + 4*IntNum); * pADR &= slot; pADR = (INT32U*)(BaseVECTADDR + 4*IntNum); * pADR = ISRAddr; } /*#if SIMULATOR_EN VICADDRESS = *pADR; #endif */ } /* ****************************************************************************** name: GetFIQStatus desc: get the status regiter of the FIQ interrupt pars: no rets: status ******************************************************************************* */ INT32U GetFIQStatus(void) { return VICFIQSTATUS; } /* ******************************************************************************* name: VIC_Enable desc: according to the interrupt channel enable the related Interrupt source pars: IntChnl rets: no ******************************************************************************* */ void VIC_Enable(INT32U IntNum) { VICINTENABLE |= 1<<IntNum; } //disable interrupt void VIC_SrcDisable(INT32U IntNum) { //VICIntEnable &= ~(1<<IntNum); VICINTENCLEAR |= 1<<IntNum; }
|