这是想做PWM的死区电路,在CPLD里实现,先写了个PWM上升沿延时处理电路,但出现怪问题:会出现行刺,计数值也有出现不确定状态。
哪位大侠能否帮我看下、指点下。谢谢!
module Edge_delay(
CLK,
Resetn,
trigger,
pos_edge2,
pos_edge3
);
input CLK; // 5.3MHz
input Resetn;
input trigger;
output pos_edge2;
output pos_edge3;
reg pos_edge2;
wire pos_edge3;
reg [3:0] counter2;
localparam cnt = 4'd11 ; //
always @(posedge CLK or negedge Resetn) //
begin
if (!Resetn)
begin
counter2 <= 4'd0 ;
pos_edge2 <= 1'b0;
end
else
begin
if (!trigger)
begin
counter2 <= 4'd0 ;
pos_edge2 <= 1'b0;
end
else if (counter2 < cnt)
begin
counter2 <= counter2 + 1'b1 ;
pos_edge2 <= 1'b1;
end
else
begin
counter2 <= cnt ;
pos_edge2 <= 1'b1;
end
end
end
assign pos_edge3 = ((counter2 == cnt) && (trigger)) ? 1'b1 : 1'b0 ;
用quartus II 13.0编译后调用modelsim仿真,pos_edge3会出行刺,而且counter2会有不确定状态。 |
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