编译成功 但是所用cell为零，warning 显示 很多寄存器是固定在GND的。。。求解答，代码如下
module spiserve(ad_in,ready,ad_out,sclk,ad_sclk);
input ready; //读ad的数据就绪
input ad_in; //ad的输入AD_DOUT1
input sclk; // SPI 总线读取时钟
input ad_sclk; // ad串行输出时钟
output ad_out; // 570输出
reg r2; // 寄存器1 满标志
reg r3; // 寄存器2 满标志
reg ad_out;
reg r1; // 代替ready 信号就行读控制，读完一次数据置0
reg en1; // 寄存器1使能，用于SPI总线读数据时，对寄存器写中断
reg en2; // 寄存器2使能
reg [4:0] counter; //读AD 计数
reg [4:0] counter2; // 输出 计数
reg [23:0] b1; //寄存器1
reg [23:0] b2; // 寄存器2
initial r2=1;
initial r3=1;
initial b1=24'h0;
initial b2=24'b0;
initial en1=1'b1;
initial en2=1'b1; // 初始化
always@(negedge ad_sclk or posedge ready)
if(ready==1)
begin r1=1'b1;
end // ready 上升沿来 就绪标志位 置1
else if(r1&&r3&&en1&&en2)
begin
if(counter<=23)
begin b1[0]<= ad_in;
b1<= b1<<1;
counter=counter+1'h1;
end
else
begin
counter=5'b0;
r1=1'b0;
r2=1'b1;
r3=1'b0;
end // 寄存器2满，写寄存器1
end
else if(r1&&r2&&en1&&en2)
begin
if(counter<=23)
begin b2[0]<= ad_in;
b2<= b2<<1;
counter=counter+1;
r2<=1'b0;
end
else
begin
counter=5'b0;
r1=1'b0;
r3=1'b1;
r2=1'b0;
end
end
// 寄存器1满，写寄存器2
else if(r1&&en1)
begin if(counter<=23)
begin b1[0]<=ad_in;
b1<=b1<<1;
counter=counter+1;
end
else
begin
counter=0;
r1=1'b0;
r2=1'b0;
r3=1'b1;
end
end
//寄存器2被读，循环写寄存器1
else if(r1&&en2)
begin if(counter<=23)
begin b2[0]<=ad_in;
b2<=b1<<1;
counter=counter+1;
end
else
begin
counter=0;
r1=1'b0;
r2=1'b1;
r3=1'b0;
end
end //寄存器1被读，循环写寄存器2
always@(posedge sclk )
if(r2) //寄存器1满，读寄存器1
begin if(counter2<=23)
begin ad_out=b1[counter];
en1=1'b0;
en2=1'b1;
counter2<=counter2+1;
end
else
begin counter2=0;
en1=1'b1;
en2=1'b1;
end
end
else begin //未满，读寄存器2
if(counter2<=23)
begin ad_out=b2[counter];
en1=1'b1;
en2=1'b0;
counter2<=counter2+1'b1;
end
else
begin counter2=1'b0;
en1=1'b1;
en2=1'b1;
end
end
endmodule |
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