mmuuss586 发表于 2014-4-15 10:42
啥都没做,跳1位不太现实,除非你的电源,信号,基准特别稳定,采样速率特别低 ...
VDDA与VREF+相连VSSA与VREF-相连
这个基准应该就是3.3v没错吧,输入信号已经通过滤波,也不会有问题,关键就是电源,如果电源不稳定,这个VDDA就会不稳定,进而这个VREF+就会不稳定,基准就不准,我这么理解对吧?我是用定时器触发的ADC,20ms触发一次,采样时间这么设置
ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_239Cycles5);
ADC_RegularChannelConfig(ADC1, ADC_Channel_1, 2, ADC_SampleTime_239Cycles5);
ADC_RegularChannelConfig(ADC1, ADC_Channel_2, 3, ADC_SampleTime_239Cycles5);
ADC_RegularChannelConfig(ADC1, ADC_Channel_3, 4, ADC_SampleTime_239Cycles5);
ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 5, ADC_SampleTime_239Cycles5);
ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 6, ADC_SampleTime_239Cycles5);
ADC_RegularChannelConfig(ADC1, ADC_Channel_6, 7, ADC_SampleTime_239Cycles5);
ADC_RegularChannelConfig(ADC1, ADC_Channel_7, 8, ADC_SampleTime_239Cycles5);
ADC_RegularChannelConfig(ADC1, ADC_Channel_16, 9, ADC_SampleTime_239Cycles5);
ADC_RegularChannelConfig(ADC1, ADC_Channel_17, 10, ADC_SampleTime_239Cycles5);
应该也是足够的。用DMA搬移数据到内存ADC_DualConvertedValueTab[10]. 用ST-LinK调试观察ADC_DualConvertedValueTab[10],跳动很大。
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