#include "stm32f10x.h"
#include "usart.h"
#include "LCD.h"
u8 DMA1_Channel5_RXBUFF1[Buff_LEN];
u8 DMA1_Channel5_RXBUFF2[Buff_LEN];
u8 DMA1_Channel5_RXBUFF3[Buff_LEN];
u8 DMA1_Channel6_RXBUFF1[Buff_LEN];
u8 DMA1_Channel6_RXBUFF2[Buff_LEN];
u8 DMA1_Channel6_RXBUFF3[Buff_LEN];
u8 DMA1_Channel5_BUFF_FreeStatus=1;
u8 DMA1_Channel6_BUFF_FreeStatus=1;
u8 DMA1_Channel4_TCStatus=1;
u8 DMA1_Channel7_TCStatus=1;
u16 DMA1_Channel5_RX_LEN;
u16 DMA1_Channel6_RX_LEN;
void Periph_RCC_Config(void)
{
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA|RCC_APB2Periph_USART1|RCC_APB2Periph_AFIO, ENABLE);
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2,ENABLE);
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
}
void USART_GPIO_Config(void)
{
GPIO_InitTypeDef USART_GPIO_InitStruct;
USART_GPIO_InitStruct.GPIO_Pin=GPIO_Pin_2|GPIO_Pin_9;
USART_GPIO_InitStruct.GPIO_Mode=GPIO_Mode_AF_PP;
USART_GPIO_InitStruct.GPIO_Speed=GPIO_Speed_50MHz;
GPIO_Init( GPIOA, &USART_GPIO_InitStruct);
USART_GPIO_InitStruct.GPIO_Pin=GPIO_Pin_3|GPIO_Pin_10;
USART_GPIO_InitStruct.GPIO_Mode=GPIO_Mode_IN_FLOATING;
GPIO_Init( GPIOA, &USART_GPIO_InitStruct);
}
/**************´®¿Ú1ÅäÖú¯Êý****************/
void USART1_Config(void)
{
USART_InitTypeDef USART1_InitStruct;
USART_GetFlagStatus(USART1, USART_FLAG_TC);
USART1_InitStruct.USART_BaudRate=9600;
USART1_InitStruct.USART_WordLength=USART_WordLength_8b;
USART1_InitStruct.USART_StopBits=USART_StopBits_1;
USART1_InitStruct.USART_Parity=USART_Parity_No;
USART1_InitStruct.USART_HardwareFlowControl=USART_HardwareFlowControl_None;
USART1_InitStruct.USART_Mode=USART_Mode_Rx|USART_Mode_Tx;
USART_Init(USART1, &USART1_InitStruct);
USART_ITConfig(USART1,USART_IT_IDLE, ENABLE);
USART_DMACmd(USART1, USART_DMAReq_Rx|USART_DMAReq_Tx, ENABLE);
USART_Cmd(USART1, ENABLE);
}
/**************´®¿Ú2ÅäÖú¯Êý****************/
void USART2_Config(void)
{
USART_InitTypeDef USART2_InitStruct;
USART_GetFlagStatus(USART2, USART_FLAG_TC);
USART2_InitStruct.USART_BaudRate=9600;
USART2_InitStruct.USART_WordLength=USART_WordLength_8b;
USART2_InitStruct.USART_StopBits=USART_StopBits_1;
USART2_InitStruct.USART_Parity=USART_Parity_No;
USART2_InitStruct.USART_HardwareFlowControl=USART_HardwareFlowControl_None;
USART2_InitStruct.USART_Mode=USART_Mode_Rx|USART_Mode_Tx;
USART_Init(USART2, &USART2_InitStruct);
USART_ITConfig(USART2,USART_IT_IDLE, ENABLE);
USART_Cmd(USART2, ENABLE);
USART_DMACmd(USART2, USART_DMAReq_Rx|USART_DMAReq_Tx, ENABLE);
}
/*************ÖжÏÅäÖú¯Êý*****************/
void NVIC_Config(void)
{
NVIC_InitTypeDef NVIC_InitStruct;
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
NVIC_InitStruct.NVIC_IRQChannel=USART1_IRQn;
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority=0;
NVIC_InitStruct.NVIC_IRQChannelSubPriority=0;
NVIC_InitStruct.NVIC_IRQChannelCmd=ENABLE;
NVIC_Init(&NVIC_InitStruct);
NVIC_InitStruct.NVIC_IRQChannel=USART2_IRQn;
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority=0;
NVIC_InitStruct.NVIC_IRQChannelSubPriority=1;
NVIC_InitStruct.NVIC_IRQChannelCmd=ENABLE;
NVIC_Init(&NVIC_InitStruct);
NVIC_InitStruct.NVIC_IRQChannel=DMA1_Channel4_IRQn;
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority=1;
NVIC_InitStruct.NVIC_IRQChannelSubPriority=0;
NVIC_InitStruct.NVIC_IRQChannelCmd=ENABLE;
NVIC_Init(&NVIC_InitStruct);
NVIC_InitStruct.NVIC_IRQChannel=DMA1_Channel7_IRQn;
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority=1;
NVIC_InitStruct.NVIC_IRQChannelSubPriority=1;
NVIC_InitStruct.NVIC_IRQChannelCmd=ENABLE;
NVIC_Init(&NVIC_InitStruct);
}
void DMA1_Channel4_Config(void)
{
DMA_InitTypeDef DMA_InitStructure;
DMA_DeInit(DMA1_Channel4);
DMA_InitStructure.DMA_PeripheralBaseAddr=(u32)&USART1->DR;
DMA_InitStructure.DMA_MemoryBaseAddr=(u32)DMA1_Channel6_RXBUFF1;
DMA_InitStructure.DMA_DIR=DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_BufferSize=Buff_LEN;
DMA_InitStructure.DMA_PeripheralInc=DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc=DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize=DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize=DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode=DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority=DMA_Priority_High;
DMA_InitStructure.DMA_M2M=DMA_M2M_Disable;
DMA_Init(DMA1_Channel4, &DMA_InitStructure);
DMA_ITConfig(DMA1_Channel4, DMA_IT_TC,ENABLE);
DMA_Cmd(DMA1_Channel4, DISABLE);
}
void DMA1_Channel5_Config(void)
{
DMA_InitTypeDef DMA_InitStructure;
DMA_DeInit(DMA1_Channel5);
DMA_InitStructure.DMA_PeripheralBaseAddr=(u32)&USART1->DR;
DMA_InitStructure.DMA_MemoryBaseAddr=(u32)DMA1_Channel5_RXBUFF1;
DMA_InitStructure.DMA_DIR=DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_BufferSize=Buff_LEN;
DMA_InitStructure.DMA_PeripheralInc=DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc=DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize=DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize=DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode=DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority=DMA_Priority_VeryHigh;
DMA_InitStructure.DMA_M2M=DMA_M2M_Disable;
DMA_Init(DMA1_Channel5, &DMA_InitStructure);
DMA_ITConfig(DMA1_Channel5, DMA_IT_TC,DISABLE);
DMA_Cmd(DMA1_Channel5, ENABLE);
}
void DMA1_Channel6_Config(void)
{
DMA_InitTypeDef DMA_InitStructure;
DMA_DeInit(DMA1_Channel6);
DMA_InitStructure.DMA_PeripheralBaseAddr=(u32)&USART2->DR;
DMA_InitStructure.DMA_MemoryBaseAddr=(u32)DMA1_Channel6_RXBUFF1;
DMA_InitStructure.DMA_DIR=DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_BufferSize=Buff_LEN;
DMA_InitStructure.DMA_PeripheralInc=DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc=DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize=DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize=DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode=DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority=DMA_Priority_VeryHigh;
DMA_InitStructure.DMA_M2M=DMA_M2M_Disable;
DMA_Init(DMA1_Channel6, &DMA_InitStructure);
DMA_ITConfig(DMA1_Channel6, DMA_IT_TC,DISABLE);
DMA_Cmd(DMA1_Channel6, ENABLE);
}
void DMA1_Channel7_Config(void)
{
DMA_InitTypeDef DMA_InitStructure;
DMA_DeInit(DMA1_Channel7);
DMA_InitStructure.DMA_PeripheralBaseAddr=(u32)&USART2->DR;
DMA_InitStructure.DMA_MemoryBaseAddr=(u32)DMA1_Channel5_RXBUFF1;
DMA_InitStructure.DMA_DIR=DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_BufferSize=Buff_LEN;
DMA_InitStructure.DMA_PeripheralInc=DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc=DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize=DMA_PeripheralDataSize_Byte;
DMA_InitStructure.DMA_MemoryDataSize=DMA_MemoryDataSize_Byte;
DMA_InitStructure.DMA_Mode=DMA_Mode_Normal;
DMA_InitStructure.DMA_Priority=DMA_Priority_VeryHigh;
DMA_InitStructure.DMA_M2M=DMA_M2M_Disable;
DMA_Init(DMA1_Channel7, &DMA_InitStructure);
DMA_ITConfig(DMA1_Channel7, DMA_IT_TC,ENABLE);
DMA_Cmd(DMA1_Channel7, DISABLE);
}
/**************´®¿Ú1ÖжϷþÎñ³ÌÐò****************/
void USART1_IRQHandler(void)
{
__IO u8 clear;
if(USART_GetITStatus(USART1,USART_IT_IDLE)!=RESET)
{
DMA_Cmd(DMA1_Channel5,DISABLE);
clear=USART1->SR;
clear=USART1->DR;
switch(DMA1_Channel5_BUFF_FreeStatus)
{
case 1:
DMA1_Channel5_BUFF_FreeStatus=2;
DMA1_Channel5->CMAR=(u32)DMA1_Channel5_RXBUFF2;
DMA1_Channel7->CMAR=(u32)DMA1_Channel5_RXBUFF1;
break;
case 2:
DMA1_Channel5_BUFF_FreeStatus=3;
DMA1_Channel5->CMAR=(u32)DMA1_Channel5_RXBUFF3;
DMA1_Channel7->CMAR=(u32)DMA1_Channel5_RXBUFF2;
break;
case 3:
DMA1_Channel5_BUFF_FreeStatus=1;
DMA1_Channel5->CMAR=(u32)DMA1_Channel5_RXBUFF1;
DMA1_Channel7->CMAR=(u32)DMA1_Channel5_RXBUFF3;
break;
}
DMA1_Channel5_RX_LEN=Buff_LEN-DMA1_Channel5->CNDTR;
if(DMA1_Channel5_RX_LEN!=0)
{
//while(DMA1_Channel7_TCStatus==0);
DMA1_Channel7_TCStatus=0;
DMA_Cmd(DMA1_Channel7,DISABLE);
DMA1_Channel7->CNDTR=DMA1_Channel5_RX_LEN;
DMA_Cmd(DMA1_Channel7,ENABLE);
}
DMA1_Channel5->CNDTR=Buff_LEN;
DMA_Cmd(DMA1_Channel5,ENABLE);
}
}
/**************´®¿Ú2ÖжϷþÎñ³ÌÐò****************/
void USART2_IRQHandler(void)
{
__IO u8 clear;
if(USART_GetITStatus(USART2,USART_IT_IDLE)!=RESET)
{
DMA_Cmd(DMA1_Channel6,DISABLE);
clear=USART2->SR;
clear=USART2->DR;
switch(DMA1_Channel6_BUFF_FreeStatus)
{
case 1:
DMA1_Channel6_BUFF_FreeStatus=2;
DMA1_Channel6->CMAR=(u32)DMA1_Channel6_RXBUFF2;
DMA1_Channel4->CMAR=(u32)DMA1_Channel6_RXBUFF1;
break;
case 2:
DMA1_Channel6_BUFF_FreeStatus=3;
DMA1_Channel6->CMAR=(u32)DMA1_Channel6_RXBUFF3;
DMA1_Channel4->CMAR=(u32)DMA1_Channel6_RXBUFF2;
break;
case 3:
DMA1_Channel6_BUFF_FreeStatus=1;
DMA1_Channel6->CMAR=(u32)DMA1_Channel6_RXBUFF1;
DMA1_Channel4->CMAR=(u32)DMA1_Channel6_RXBUFF3;
break;
}
DMA1_Channel6_RX_LEN=Buff_LEN-DMA1_Channel6->CNDTR;
if(DMA1_Channel6_RX_LEN!=0)
{
//while(DMA1_Channel4_TCStatus==0);
DMA1_Channel4_TCStatus=0;
DMA_Cmd(DMA1_Channel4,DISABLE);
DMA1_Channel4->CNDTR=DMA1_Channel6_RX_LEN;
DMA_Cmd(DMA1_Channel4,ENABLE);
}
DMA1_Channel6->CNDTR=Buff_LEN;
DMA_Cmd(DMA1_Channel6,ENABLE);
}
}
void DMA1_Channel4_IRQHandler(void)
{
if(DMA_GetITStatus(DMA1_IT_TC4)!=RESET)
{
DMA_ClearITPendingBit(DMA1_IT_TC4);
DMA_Cmd(DMA1_Channel4,DISABLE);
DMA1_Channel4_TCStatus=1;
}
}
void DMA1_Channel7_IRQHandler(void)
{
if(DMA_GetITStatus(DMA1_IT_TC7)!=RESET)
{
DMA_ClearITPendingBit(DMA1_IT_TC7);
DMA_Cmd(DMA1_Channel7,DISABLE);
DMA1_Channel7_TCStatus=1;
}
}
/**************±ê×¼º¯ÊýÖض¨Ïò****************/
int fputc(int ch,FILE *f)
{
USART_ClearFlag(USART1,USART_FLAG_TC);
USART_SendData(USART1, (unsigned char) ch);
while(USART_GetFlagStatus(USART1, USART_FLAG_TC)!=SET);
return(ch);
}
请各位大神帮忙看看到底是什么问题,感谢!