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[STM32F1] 串口数据相互传递的问题

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1208|1
 楼主| chen918912 发表于 2014-8-2 20:39 | 显示全部楼层 |阅读模式
串口数据, DMA, DM, ST, ni
问题描述:
       数据传递方向：PC→STM32 USART1→STM32 USART2→GSM模块→STM32 USART2→STM32 USART1→PC，两串口都采用DMA模式。STM32型号为STM32F103ZET6，GSM模块信号为SIM900A.当PC以120ms的间隔发送AT指令时，返回数据正常如图
120ms.png
                      120ms发送AT指令
当PC以110ms的间隔发送AT指令时，数据不正常，如图：

110ms发送AT指令

110ms发送AT指令 ：
                  110ms发送AT指令
代码如下：
复制
  1. #include "stm32f10x.h"
    

  2. #include "usart.h"
    

  3. #include "LCD.h"
    


  4. 

  5. u8 DMA1_Channel5_RXBUFF1[Buff_LEN];
    

  6. u8 DMA1_Channel5_RXBUFF2[Buff_LEN];
    

  7. u8 DMA1_Channel5_RXBUFF3[Buff_LEN];
    


  8. 

  9. u8 DMA1_Channel6_RXBUFF1[Buff_LEN];
    

  10. u8 DMA1_Channel6_RXBUFF2[Buff_LEN];
    

  11. u8 DMA1_Channel6_RXBUFF3[Buff_LEN];
    

  12. u8 DMA1_Channel5_BUFF_FreeStatus=1;
    

  13. u8 DMA1_Channel6_BUFF_FreeStatus=1;
    

  14. u8 DMA1_Channel4_TCStatus=1;
    

  15. u8 DMA1_Channel7_TCStatus=1;
    

  16. u16 DMA1_Channel5_RX_LEN;
    

  17. u16 DMA1_Channel6_RX_LEN;
    


  18. 

  19. void Periph_RCC_Config(void)
    

  20. {
    

  21.         RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA|RCC_APB2Periph_USART1|RCC_APB2Periph_AFIO, ENABLE);
    

  22.         RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2,ENABLE);
    

  23.         RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
    

  24. }
    


  25. 

  26. void USART_GPIO_Config(void)
    

  27. {
    

  28.         GPIO_InitTypeDef USART_GPIO_InitStruct;
    

  29.         USART_GPIO_InitStruct.GPIO_Pin=GPIO_Pin_2|GPIO_Pin_9;
    

  30.         USART_GPIO_InitStruct.GPIO_Mode=GPIO_Mode_AF_PP;
    

  31.         USART_GPIO_InitStruct.GPIO_Speed=GPIO_Speed_50MHz;
    

  32.         GPIO_Init( GPIOA, &USART_GPIO_InitStruct);
    

  33.         USART_GPIO_InitStruct.GPIO_Pin=GPIO_Pin_3|GPIO_Pin_10;
    

  34.         USART_GPIO_InitStruct.GPIO_Mode=GPIO_Mode_IN_FLOATING;
    

  35.         GPIO_Init( GPIOA, &USART_GPIO_InitStruct);        
    

  36. }
    


  37. 


  38. 

  39. /**************´®¿Ú1ÅäÖú¯Êý****************/
    


  40. 

  41. void USART1_Config(void)
    

  42. {
    

  43.         USART_InitTypeDef USART1_InitStruct;
    

  44.         USART_GetFlagStatus(USART1, USART_FLAG_TC);                
    

  45.         USART1_InitStruct.USART_BaudRate=9600;
    

  46.         USART1_InitStruct.USART_WordLength=USART_WordLength_8b;
    

  47.         USART1_InitStruct.USART_StopBits=USART_StopBits_1;
    

  48.         USART1_InitStruct.USART_Parity=USART_Parity_No;
    

  49.         USART1_InitStruct.USART_HardwareFlowControl=USART_HardwareFlowControl_None;
    

  50.         USART1_InitStruct.USART_Mode=USART_Mode_Rx|USART_Mode_Tx;
    

  51.         USART_Init(USART1, &USART1_InitStruct);
    

  52.         USART_ITConfig(USART1,USART_IT_IDLE, ENABLE);
    

  53.         USART_DMACmd(USART1, USART_DMAReq_Rx|USART_DMAReq_Tx, ENABLE);
    

  54.         USART_Cmd(USART1, ENABLE);
    

  55. }
    


  56. 

  57. /**************´®¿Ú2ÅäÖú¯Êý****************/
    


  58. 

  59. void USART2_Config(void)
    

  60. {
    

  61.         USART_InitTypeDef USART2_InitStruct;
    

  62.         USART_GetFlagStatus(USART2, USART_FLAG_TC);        
    

  63.         USART2_InitStruct.USART_BaudRate=9600;
    

  64.         USART2_InitStruct.USART_WordLength=USART_WordLength_8b;
    

  65.         USART2_InitStruct.USART_StopBits=USART_StopBits_1;
    

  66.         USART2_InitStruct.USART_Parity=USART_Parity_No;
    

  67.         USART2_InitStruct.USART_HardwareFlowControl=USART_HardwareFlowControl_None;
    

  68.         USART2_InitStruct.USART_Mode=USART_Mode_Rx|USART_Mode_Tx;
    

  69.         USART_Init(USART2, &USART2_InitStruct);
    

  70.         USART_ITConfig(USART2,USART_IT_IDLE, ENABLE);
    

  71.         USART_Cmd(USART2, ENABLE);
    

  72.         USART_DMACmd(USART2, USART_DMAReq_Rx|USART_DMAReq_Tx, ENABLE);
    

  73. }
    


  74. 

  75. /*************ÖжÏÅäÖú¯Êý*****************/
    


  76. 

  77. void NVIC_Config(void)
    

  78. {
    

  79.         NVIC_InitTypeDef NVIC_InitStruct;
    

  80.         NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
    

  81.         
    

  82.         NVIC_InitStruct.NVIC_IRQChannel=USART1_IRQn;
    

  83.         NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority=0;
    

  84.         NVIC_InitStruct.NVIC_IRQChannelSubPriority=0;
    

  85.         NVIC_InitStruct.NVIC_IRQChannelCmd=ENABLE;
    

  86.         NVIC_Init(&NVIC_InitStruct);
    

  87.         
    

  88.         NVIC_InitStruct.NVIC_IRQChannel=USART2_IRQn;
    

  89.         NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority=0;
    

  90.         NVIC_InitStruct.NVIC_IRQChannelSubPriority=1;
    

  91.         NVIC_InitStruct.NVIC_IRQChannelCmd=ENABLE;
    

  92.         NVIC_Init(&NVIC_InitStruct);
    

  93.         
    

  94.         NVIC_InitStruct.NVIC_IRQChannel=DMA1_Channel4_IRQn;
    

  95.         NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority=1;
    

  96.         NVIC_InitStruct.NVIC_IRQChannelSubPriority=0;
    

  97.         NVIC_InitStruct.NVIC_IRQChannelCmd=ENABLE;
    

  98.         NVIC_Init(&NVIC_InitStruct);
    

  99.         
    

  100.         NVIC_InitStruct.NVIC_IRQChannel=DMA1_Channel7_IRQn;
    

  101.         NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority=1;
    

  102.         NVIC_InitStruct.NVIC_IRQChannelSubPriority=1;
    

  103.         NVIC_InitStruct.NVIC_IRQChannelCmd=ENABLE;
    

  104.         NVIC_Init(&NVIC_InitStruct);
    

  105. }
    


  106. 

  107. void DMA1_Channel4_Config(void)
    

  108. {
    

  109.         DMA_InitTypeDef DMA_InitStructure;
    

  110.         DMA_DeInit(DMA1_Channel4);
    

  111.         DMA_InitStructure.DMA_PeripheralBaseAddr=(u32)&USART1->DR;
    

  112.         DMA_InitStructure.DMA_MemoryBaseAddr=(u32)DMA1_Channel6_RXBUFF1;
    

  113.         DMA_InitStructure.DMA_DIR=DMA_DIR_PeripheralDST;
    

  114.         DMA_InitStructure.DMA_BufferSize=Buff_LEN;
    

  115.         DMA_InitStructure.DMA_PeripheralInc=DMA_PeripheralInc_Disable;
    

  116.         DMA_InitStructure.DMA_MemoryInc=DMA_MemoryInc_Enable;
    

  117.         DMA_InitStructure.DMA_PeripheralDataSize=DMA_PeripheralDataSize_Byte;
    

  118.         DMA_InitStructure.DMA_MemoryDataSize=DMA_MemoryDataSize_Byte;
    

  119.         DMA_InitStructure.DMA_Mode=DMA_Mode_Normal;
    

  120.         DMA_InitStructure.DMA_Priority=DMA_Priority_High;
    

  121.         DMA_InitStructure.DMA_M2M=DMA_M2M_Disable;
    

  122.         DMA_Init(DMA1_Channel4, &DMA_InitStructure);
    

  123.         DMA_ITConfig(DMA1_Channel4, DMA_IT_TC,ENABLE);
    

  124.         DMA_Cmd(DMA1_Channel4, DISABLE);
    

  125.         
    

  126. }
    


  127. 

  128. void DMA1_Channel5_Config(void)
    

  129. {
    

  130.         DMA_InitTypeDef DMA_InitStructure;
    

  131.         DMA_DeInit(DMA1_Channel5);
    

  132.         DMA_InitStructure.DMA_PeripheralBaseAddr=(u32)&USART1->DR;
    

  133.         DMA_InitStructure.DMA_MemoryBaseAddr=(u32)DMA1_Channel5_RXBUFF1;
    

  134.         DMA_InitStructure.DMA_DIR=DMA_DIR_PeripheralSRC;
    

  135.         DMA_InitStructure.DMA_BufferSize=Buff_LEN;
    

  136.         DMA_InitStructure.DMA_PeripheralInc=DMA_PeripheralInc_Disable;
    

  137.         DMA_InitStructure.DMA_MemoryInc=DMA_MemoryInc_Enable;
    

  138.         DMA_InitStructure.DMA_PeripheralDataSize=DMA_PeripheralDataSize_Byte;
    

  139.         DMA_InitStructure.DMA_MemoryDataSize=DMA_MemoryDataSize_Byte;
    

  140.         DMA_InitStructure.DMA_Mode=DMA_Mode_Circular;
    

  141.         DMA_InitStructure.DMA_Priority=DMA_Priority_VeryHigh;
    

  142.         DMA_InitStructure.DMA_M2M=DMA_M2M_Disable;
    

  143.         DMA_Init(DMA1_Channel5, &DMA_InitStructure);
    

  144.         DMA_ITConfig(DMA1_Channel5, DMA_IT_TC,DISABLE);
    

  145.         DMA_Cmd(DMA1_Channel5, ENABLE);
    

  146. }
    


  147. 

  148. void DMA1_Channel6_Config(void)
    

  149. {
    

  150.         DMA_InitTypeDef DMA_InitStructure;
    

  151.         DMA_DeInit(DMA1_Channel6);
    

  152.         DMA_InitStructure.DMA_PeripheralBaseAddr=(u32)&USART2->DR;
    

  153.         DMA_InitStructure.DMA_MemoryBaseAddr=(u32)DMA1_Channel6_RXBUFF1;
    

  154.         DMA_InitStructure.DMA_DIR=DMA_DIR_PeripheralSRC;
    

  155.         DMA_InitStructure.DMA_BufferSize=Buff_LEN;
    

  156.         DMA_InitStructure.DMA_PeripheralInc=DMA_PeripheralInc_Disable;
    

  157.         DMA_InitStructure.DMA_MemoryInc=DMA_MemoryInc_Enable;
    

  158.         DMA_InitStructure.DMA_PeripheralDataSize=DMA_PeripheralDataSize_Byte;
    

  159.         DMA_InitStructure.DMA_MemoryDataSize=DMA_MemoryDataSize_Byte;
    

  160.         DMA_InitStructure.DMA_Mode=DMA_Mode_Normal;
    

  161.         DMA_InitStructure.DMA_Priority=DMA_Priority_VeryHigh;
    

  162.         DMA_InitStructure.DMA_M2M=DMA_M2M_Disable;
    

  163.         DMA_Init(DMA1_Channel6, &DMA_InitStructure);
    

  164.         DMA_ITConfig(DMA1_Channel6, DMA_IT_TC,DISABLE);
    

  165.         DMA_Cmd(DMA1_Channel6, ENABLE);
    

  166. }
    


  167. 

  168. void DMA1_Channel7_Config(void)
    

  169. {
    

  170.         DMA_InitTypeDef DMA_InitStructure;
    

  171.         DMA_DeInit(DMA1_Channel7);
    

  172.         DMA_InitStructure.DMA_PeripheralBaseAddr=(u32)&USART2->DR;
    

  173.         DMA_InitStructure.DMA_MemoryBaseAddr=(u32)DMA1_Channel5_RXBUFF1;
    

  174.         DMA_InitStructure.DMA_DIR=DMA_DIR_PeripheralDST;
    

  175.         DMA_InitStructure.DMA_BufferSize=Buff_LEN;
    

  176.         DMA_InitStructure.DMA_PeripheralInc=DMA_PeripheralInc_Disable;
    

  177.         DMA_InitStructure.DMA_MemoryInc=DMA_MemoryInc_Enable;
    

  178.         DMA_InitStructure.DMA_PeripheralDataSize=DMA_PeripheralDataSize_Byte;
    

  179.         DMA_InitStructure.DMA_MemoryDataSize=DMA_MemoryDataSize_Byte;
    

  180.         DMA_InitStructure.DMA_Mode=DMA_Mode_Normal;
    

  181.         DMA_InitStructure.DMA_Priority=DMA_Priority_VeryHigh;
    

  182.         DMA_InitStructure.DMA_M2M=DMA_M2M_Disable;
    

  183.         DMA_Init(DMA1_Channel7, &DMA_InitStructure);
    

  184.         DMA_ITConfig(DMA1_Channel7, DMA_IT_TC,ENABLE);
    

  185.         DMA_Cmd(DMA1_Channel7, DISABLE);        
    

  186. }
    


  187. 


  188. 

  189. /**************´®¿Ú1ÖжϷþÎñ³ÌÐò****************/
    


  190. 

  191. void USART1_IRQHandler(void)
    

  192. {
    

  193.         __IO        u8 clear;
    

  194.         if(USART_GetITStatus(USART1,USART_IT_IDLE)!=RESET)
    

  195.         {
    

  196.                 DMA_Cmd(DMA1_Channel5,DISABLE);
    

  197.                 clear=USART1->SR;
    

  198.                 clear=USART1->DR;
    

  199.                 switch(DMA1_Channel5_BUFF_FreeStatus)
    

  200.                 {
    

  201.                         case 1: 
    

  202.                         DMA1_Channel5_BUFF_FreeStatus=2;
    

  203.                         DMA1_Channel5->CMAR=(u32)DMA1_Channel5_RXBUFF2;
    

  204.                         DMA1_Channel7->CMAR=(u32)DMA1_Channel5_RXBUFF1;
    

  205.                         break;
    

  206.                         case 2:
    

  207.                         DMA1_Channel5_BUFF_FreeStatus=3;
    

  208.                         DMA1_Channel5->CMAR=(u32)DMA1_Channel5_RXBUFF3;
    

  209.                         DMA1_Channel7->CMAR=(u32)DMA1_Channel5_RXBUFF2;
    

  210.                         break;
    

  211.                         case 3:
    

  212.                         DMA1_Channel5_BUFF_FreeStatus=1;
    

  213.                         DMA1_Channel5->CMAR=(u32)DMA1_Channel5_RXBUFF1;
    

  214.                         DMA1_Channel7->CMAR=(u32)DMA1_Channel5_RXBUFF3;
    

  215.                         break;
    

  216.                 }
    

  217.                 DMA1_Channel5_RX_LEN=Buff_LEN-DMA1_Channel5->CNDTR;
    

  218.                 if(DMA1_Channel5_RX_LEN!=0)
    

  219.                 {
    

  220.                         //while(DMA1_Channel7_TCStatus==0);
    

  221.                         DMA1_Channel7_TCStatus=0;
    

  222.                         DMA_Cmd(DMA1_Channel7,DISABLE);
    

  223.                         DMA1_Channel7->CNDTR=DMA1_Channel5_RX_LEN;
    

  224.                         DMA_Cmd(DMA1_Channel7,ENABLE);
    

  225.                 }
    

  226.                 DMA1_Channel5->CNDTR=Buff_LEN;
    

  227.                 DMA_Cmd(DMA1_Channel5,ENABLE);
    

  228.         }
    

  229. }
    


  230. 

  231. /**************´®¿Ú2ÖжϷþÎñ³ÌÐò****************/
    


  232. 

  233. void USART2_IRQHandler(void)
    

  234. {
    

  235.         __IO        u8 clear;
    

  236.         if(USART_GetITStatus(USART2,USART_IT_IDLE)!=RESET)
    

  237.         {
    

  238.                 DMA_Cmd(DMA1_Channel6,DISABLE);
    

  239.                 clear=USART2->SR;
    

  240.                 clear=USART2->DR;
    

  241.                 switch(DMA1_Channel6_BUFF_FreeStatus)
    

  242.                 {
    

  243.                         case 1: 
    

  244.                         DMA1_Channel6_BUFF_FreeStatus=2;
    

  245.                         DMA1_Channel6->CMAR=(u32)DMA1_Channel6_RXBUFF2;
    

  246.                         DMA1_Channel4->CMAR=(u32)DMA1_Channel6_RXBUFF1;
    

  247.                         break;
    

  248.                         case 2:
    

  249.                         DMA1_Channel6_BUFF_FreeStatus=3;
    

  250.                         DMA1_Channel6->CMAR=(u32)DMA1_Channel6_RXBUFF3;
    

  251.                         DMA1_Channel4->CMAR=(u32)DMA1_Channel6_RXBUFF2;
    

  252.                         break;
    

  253.                         case 3:
    

  254.                         DMA1_Channel6_BUFF_FreeStatus=1;
    

  255.                         DMA1_Channel6->CMAR=(u32)DMA1_Channel6_RXBUFF1;
    

  256.                         DMA1_Channel4->CMAR=(u32)DMA1_Channel6_RXBUFF3;
    

  257.                         break;
    

  258.                 }
    

  259.                 DMA1_Channel6_RX_LEN=Buff_LEN-DMA1_Channel6->CNDTR;
    

  260.                 if(DMA1_Channel6_RX_LEN!=0)
    

  261.                 {
    

  262.                         //while(DMA1_Channel4_TCStatus==0);
    

  263.                         DMA1_Channel4_TCStatus=0;
    

  264.                         DMA_Cmd(DMA1_Channel4,DISABLE);
    

  265.                         DMA1_Channel4->CNDTR=DMA1_Channel6_RX_LEN;
    

  266.                         DMA_Cmd(DMA1_Channel4,ENABLE);
    

  267.                 }
    

  268.                 DMA1_Channel6->CNDTR=Buff_LEN;
    

  269.                 DMA_Cmd(DMA1_Channel6,ENABLE);
    

  270.         }
    

  271. }
    


  272. 

  273. void DMA1_Channel4_IRQHandler(void)
    

  274. {
    

  275.         if(DMA_GetITStatus(DMA1_IT_TC4)!=RESET)
    

  276.         {
    

  277.                 DMA_ClearITPendingBit(DMA1_IT_TC4);
    

  278.                 DMA_Cmd(DMA1_Channel4,DISABLE);
    

  279.                 DMA1_Channel4_TCStatus=1;
    

  280.         }
    

  281. }
    


  282. 


  283. 

  284. void DMA1_Channel7_IRQHandler(void)
    

  285. {
    

  286.         if(DMA_GetITStatus(DMA1_IT_TC7)!=RESET)
    

  287.         {
    

  288.                 DMA_ClearITPendingBit(DMA1_IT_TC7);
    

  289.                 DMA_Cmd(DMA1_Channel7,DISABLE);
    

  290.                 DMA1_Channel7_TCStatus=1;
    

  291.         }
    

  292. }
    


  293. 

  294. /**************±ê×¼º¯ÊýÖض¨Ïò****************/
    


  295. 

  296. int fputc(int ch,FILE *f)
    

  297. {
    

  298.         USART_ClearFlag(USART1,USART_FLAG_TC);
    

  299.         USART_SendData(USART1, (unsigned char) ch);
    

  300.         while(USART_GetFlagStatus(USART1, USART_FLAG_TC)!=SET);
    

  301.         return(ch);
    

  302. }
请各位大神帮忙看看到底是什么问题，感谢！


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airwill 发表于 2014-8-5 12:09 | 显示全部楼层
由于数据传输后, 要经过多级传递, 另外还有 GPS 模块的响应速度, 是不是 110mS 的时候系统响应来不及了呢?
这种问题, 最好找调试器帮助吧.
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