我用CC1101做通信测试,大部分时候可以正常通信,但是如果某次接收出现错误后再往下的接收都是错误的,我发射端10秒发一次数据,每次发10次然后停10分钟重复发送10次。通常跑一天左右就会出现这接收错误现象,有信号,但是接收的数据不对。但是有时能跑3到4天才出错,十分不解。但是我在发送端发个错误码给接收,虽然接收错误了,但是下次再发正确的数据时还是能接收,(发送的错码第一次是数据错,长度一样,第二次是数据正确,数据长度错[61个字节,我发50个])但是发完错误数据后再发正确数据又没有问题,还是能正确接收。网上有人说是运行的时间久了发生频率偏移,但是我的寄存器设置是自动校正的,请教一些大家这是什么原因造成的?
接收程序是通过中断触发的,直接就是信号中断来了,点灯,发收包,对比数据,正确再点一个灯,延时一下后两个灯熄灭,这个没有必要贴出来了
我就贴下配置吧TI_CC_SPIWriteReg(TI_CCxxx0_IOCFG0, 0x06); // GDO0 output pin config.
TI_CC_SPIWriteReg(TI_CCxxx0_PKTLEN, 0x3D); // Packet length.
TI_CC_SPIWriteReg(TI_CCxxx0_PKTCTRL1, 0x04); // Packet automation control.
TI_CC_SPIWriteReg(TI_CCxxx0_PKTCTRL0, 0x05); // Packet automation control.
TI_CC_SPIWriteReg(TI_CCxxx0_ADDR, 0x00); // Device address.
TI_CC_SPIWriteReg(TI_CCxxx0_CHANNR, 0x00); // Channel number.
TI_CC_SPIWriteReg(TI_CCxxx0_FSCTRL1, 0x0B); // Freq synthesizer control.
TI_CC_SPIWriteReg(TI_CCxxx0_FSCTRL0, 0x00); // Freq synthesizer control.
TI_CC_SPIWriteReg(TI_CCxxx0_FREQ2, 0x5D); // Freq control word, high byte
TI_CC_SPIWriteReg(TI_CCxxx0_FREQ1, 0x93); // Freq control word, mid byte.
TI_CC_SPIWriteReg(TI_CCxxx0_FREQ0, 0xB1); // Freq control word, low byte.
TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG4, 0x78); // Modem configuration.
TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG3, 0x93); // Modem configuration.
TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG2, 0x83); // Modem configuration.
TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG1, 0x22); // Modem configuration.
TI_CC_SPIWriteReg(TI_CCxxx0_MDMCFG0, 0xF8); // Modem configuration.
TI_CC_SPIWriteReg(TI_CCxxx0_DEVIATN, 0x44); // Modem dev (when FSK mod en)
TI_CC_SPIWriteReg(TI_CCxxx0_MCSM1 , 0x30); //MainRadio Cntrl State Machine
TI_CC_SPIWriteReg(TI_CCxxx0_MCSM0 , 0x18); //MainRadio Cntrl State Machine
TI_CC_SPIWriteReg(TI_CCxxx0_FOCCFG, 0x16); // Freq Offset Compens. Config
TI_CC_SPIWriteReg(TI_CCxxx0_BSCFG, 0x6C); // Bit synchronization config.
TI_CC_SPIWriteReg(TI_CCxxx0_AGCCTRL2, 0x43); // AGC control.
TI_CC_SPIWriteReg(TI_CCxxx0_AGCCTRL1, 0x40); // AGC control.
TI_CC_SPIWriteReg(TI_CCxxx0_AGCCTRL0, 0x91); // AGC control.
TI_CC_SPIWriteReg(TI_CCxxx0_FREND1, 0x56); // Front end RX configuration.
TI_CC_SPIWriteReg(TI_CCxxx0_FREND0, 0x10); // Front end RX configuration.
TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL3, 0xA9); // Frequency synthesizer cal.
TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL2, 0x0A); // Frequency synthesizer cal.
TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL1, 0x00); // Frequency synthesizer cal.
TI_CC_SPIWriteReg(TI_CCxxx0_FSCAL0, 0x11); // Frequency synthesizer cal.
TI_CC_SPIWriteReg(TI_CCxxx0_FSTEST, 0x59); // Frequency synthesizer cal.
TI_CC_SPIWriteReg(TI_CCxxx0_TEST2, 0x88); // Various test settings.
TI_CC_SPIWriteReg(TI_CCxxx0_TEST1, 0x31); // Various test settings.
TI_CC_SPIWriteReg(TI_CCxxx0_TEST0, 0x0B); // Various test settings.
|