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| 本帖最后由 yyl830113 于 2015-1-29 09:10 编辑 
 描述This low power mode implementation realizes processor powerconsumption less than 0.1 mW while keeping LPDDR2 memory in self refreshconsuming ~ 1.6 mW. The system solution is comprised of AM437x Sitaraprocessor, LPDDR2 memory and TPS65218 power management IC and optimized for newlow power mode along with support for legacy low power modes. The processorpower is minimized by turning off all the processor power supplies except RTCpower supply. System power state transitions including power supply control canbe performed by single interface signal (PMIC_PWR_EN signal) with PMIC registerprogramming.
 特性
 Suspend to RAM with the lowest     system power mode
 AM437x in RTC-only modeTPS65218 in suspend stateLPDDR2 in self refresh
System can resume back to the     state it was before suspendingRTC-only suspend power consumption
 AM43x + TPS65218: < 0.1 mWTypical 2Gb LPDDR2: 1.6 mW
Suspend Events by:
 By programming RTC registersBy setting up the RTC alarm
Resume Events:
 RTC alarm goes offPMIC push button or AC power detection
Resume Time
 < 300 msec hardware latency< 1 sec for software to resume      to previous state (depending on application use case)
This design is tested and includes     schematics, BOM, and design guide.
 完整的电路原理图
 
 
 
 
 
 
 
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