#if defined(NO_PLL_INIT)
mcg_clk_hz = 21000000; //FEI mode
SIM_SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK; // clear PLLFLLSEL to select the FLL for this clock source
uart0_clk_khz = (mcg_clk_hz / 1000); // the uart0 clock frequency will equal the FLL frequency
这个21000000是怎么确认的?内部晶振怎么确定,怎么初始化。 |