Atmel SAM V71 Cortex-M7的特点

2万 · 2015-3-6 19:21

Features
 Core
̶ ARM Cortex-M7 running at up to 300 MHz(1)
̶ 16 Kbytes of ICache and 16 Kbytes of DCache with Error Code Correction (ECC)
̶ Simple- and double-precision HW Floating Point Unit (FPU)
̶ Memory Protection Unit (MPU) with 16 zones
̶ DSP Instructions, Thumb®-2 Instruction Set
̶ Embedded Trace Module (ETM) with instruction trace stream, including Trace Port Interface Unit (TPIU)
 Memories
̶ Up to 2048 Kbytes embedded Flash with unique identifier
̶ Embedded Flash Controller
̶ Up to 384 Kbytes embedded Multi-port SRAM
̶ Tightly Coupled Memory (TCM) interface with four configurations (disabled, 2 x 32 Kbytes, 2 x 64 Kbytes, 2 x
128 Kbytes)
̶ 16 Kbytes ROM with embedded Boot Loader routines (UART0, USB) and IAP routines
̶ 16-bit Static Memory Controller (SMC) with support for SRAM, PSRAM, NOR and NAND Flash
̶ 16-bit SDRAM Controller
 System
̶ Embedded voltage regulator for single-supply operation
̶ Power-on-Reset (POR), Brown-out Detector (BOD) and Dual Watchdog for safe operation
̶ Quartz or ceramic resonator oscillators: 3 to 20 MHz main oscillator with failure detection, 12 MHz or 16 MHz
needed for USB operations. Optional low-power 32.768 kHz for RTC or device clock
̶ RTC with Gregorian and Persian calendar mode, waveform generation in low-power modes
̶ RTC clock calibration circuitry for 32.768 kHz crystal frequency compensation
̶ High-precision 4/8/12 MHz factory-trimmed internal RC oscillator with 4 MHz default frequency for device
startup. In-application trimming access for frequency adjustment
̶ Slow Clock Internal RC oscillator as permanent low-power mode device clock
̶ One 500 MHz PLL for system clock, one 480 MHz PLL for USB high-speed operations
̶ Temperature Sensor
̶ One dual-port 24-channel Central DMA Controller
 Low-Power Modes
̶ Sleep, Wait and Backup modes, with power consumption down to 3 μA in Backup mode
̶ Ultra-low-power RTC and RTT
̶ 1 Kbyte of backup RAM with dedicated regulator
SAM V71 [PRELIMINARY DATASHEET] 3
Atmel-44003B-ATARM-SAM V71-Preliminary Datasheet_24-Feb-15
 Peripherals
̶ One Ethernet MAC (GMAC) 10/100 Mbps in MII mode and RMII with dedicated DMA. IEEE1588 PTP frames
and 802.3az Energy-efficiency support. Ethernet AVB support with IEEE802.1AS Time-stamping and
IEEE802.1Qav credit-based traffic-shaping hardware support.
̶ USB 2.0 Device/Mini Host High-speed (USBHS) at 480 Mbps, 4-kbyte FIFO, up to 10 bidirectional endpoints,
dedicated DMA
̶ 12-bit ITU-R BT. 601/656 Image Sensor Interface (ISI)
̶ Two Master CAN-FD Controllers with SRAM-based mailboxes, time- and event-triggered transmission
̶ MediaLB® device with 3-wire mode, up to 1024 x Fs speed, supporting MOST25 and MOST50 networks
̶ Three USARTs. USART0/1/2 support LIN mode, ISO7816, IrDA®, RS-485, SPI, Manchester and Modem
modes; USART1 supports LON mode.
̶ Five 2-wire UARTs with SleepWalking support
̶ Three Two-Wire Interfaces (TWIHS) (I2C-compatible) with SleepWalking support
̶ Quad I/O Serial Peripheral Interface (QSPI) with eXecute-In-Place feature to a dedicated AHB memory zone
̶ Two Serial Peripheral Interfaces (SPI)
̶ One Serial Synchronous Controller (SSC) with I2S and TDM support
̶ One High-speed Multimedia Card Interface (SDIO/SD Card/MMC)
̶ Four Three-Channel 16-bit Timer/Counters with Capture, Waveform, Compare and PWM modes, constant on
time. Quadrature decoder logic and 2-bit Gray Up/Down Counter for stepper motor
̶ Two 4-channel 16-bit PWMs with complementary outputs, Dead Time Generator and eight fault inputs per PWM
for motor control, two external triggers to manage power factor correction (PFC), DC-DC and lighting control.
̶ 32-bit low-power Real-time Timer (RTT)
̶ Real-time Counter (RTC) with calendar and alarm features
̶ Two ADCs, each supporting up to 12 channels with differential input mode and programmable gain stage,
allowing dual sampling and hold at up to 2 Msps. Gain and Offset error Autotest feature.
̶ One 2-channel 12-bit 2 Msps DAC
̶ One Analog Comparator with flexible input selection, selectable input hysteresis
 Cryptography
̶ True Random Number Generator (TRNG)
̶ AES: 256-, 192-, 128-bit Key Algorithm, Compliant with FIPS PUB-197 Specifications
̶ Integrity Check Monitor (ICM). Supports Secure Hash Algorithm SHA1, SHA224 and SHA256.
 I/O
̶ Up to 115 I/O lines with external interrupt capability (edge- or level-sensitivity), debouncing, glitch filtering and
On-die Series Resistor Termination
̶ Five Parallel Input/Output Controllers
 Voltage
̶ Single supply voltage from 1.62V to 3.6V
 Automotive
̶ Qualification AEC-Q100 grade 2 ([-40°C : +105°C] ambient temperature)
 Packages
̶ LQFP144, 144-lead LQFP, 20 x 20 mm, pitch 0.5 mm
̶ LFBGA144, 144-ball LFBGA, 10 x 10 mm, pitch 0.8 mm
̶ LQFP100, 100-lead LQFP, 14 x 14 mm, pitch 0.5 mm
̶ TFBGA100, 100-ball TFBGA, 9 x 9 mm, pitch 0.8 mm
̶ LQFP64, 64-lead LQFP, 10 x 10 mm, pitch 0.5 mm
̶ TFBGA64, 64-ball TFBGA, TBD(2)
̶ QFN64, 64-pad QFN 9x9 mm, pitch 0.5 mm, with wettable flanks(2)
Notes: 1. 300 MHz is at [-40°C : +105°C], 1.2V or with the internal regulator.
2. Contact your local Atmel sales representative for availability.

从上面粘贴的特性，可以看出，V71不但存贮器大了速度快了，还有一些高难的东东在里边，

如：12-bit ITU-R BT. 601/656 Image Sensor Interface (ISI)