GD32F130C8T6使用HSI时倍频到48MHz时钟不正常

只看该作者 · 2015-4-13 15:42

之前是用的STM32F030C8T6用HSI倍频到48MHz都很正常，但是用GD32F130C8T6的HSI倍频到48MHz时，发现它的时钟异常。通过PWM设置成20KHz输出验证发现频率为10.7Khz。很奇怪的是PLL倍频设为6倍时，输出的频率是10KHz。只要设置成6倍以上是，就都变成10.7KHz输出。以下是时钟配置代码。
//#define SYSCLK_FREQ_HSE HSE_VALUE
//#define SYSCLK_FREQ_24MHz  24000000
//#define SYSCLK_FREQ_36MHz  36000000
//#define SYSCLK_FREQ_48MHz  48000000
//#define SYSCLK_FREQ_56MHz  56000000
//#define SYSCLK_FREQ_72MHz  72000000
#define SYSCLK_FREQ_HSI    48000000

static void Set_SysClock(void)
{
#ifdef SYSCLK_FREQ_HSE
Set_SysClockToHSE();
#elif defined SYSCLK_FREQ_24MHz
Set_SysClockTo24();
#elif defined SYSCLK_FREQ_36MHz
Set_SysClockTo36();
#elif defined SYSCLK_FREQ_48MHz
Set_SysClockTo48();
#elif defined SYSCLK_FREQ_56MHz
Set_SysClockTo56();
#elif defined SYSCLK_FREQ_72MHz
Set_SysClockTo72();
#else
Set_SysClockToHSI();
#endif
}

static void Set_SysClockToHSI (void)
{
__IO uint32_t StartUpCounter = 0, HSIStatus = 0;

/* SYSCLK, HCLK, PCLK configuration ----------------------------------------*/
/* Enable HSI */
RCC->GCCR |= ((uint32_t)RCC_GCCR_HSIEN);

/* Wait till HSI is ready and if Time out is reached exit */
do
{
HSIStatus = RCC->GCCR & RCC_GCCR_HSISTB;
StartUpCounter++;
} while((HSIStatus == 0) && (StartUpCounter != HSI_STARTUP_TIMEOUT));

if ((RCC->GCCR & RCC_GCCR_HSISTB) != RESET)
{
HSIStatus = (uint32_t)0x01;
}
else
{
HSIStatus = (uint32_t)0x00;
}

if (HSIStatus == (uint32_t)0x01)
{
/* AHB = SYSCLK not divided */
      RCC->GCFGR |= (uint32_t)RCC_GCFGR_AHBPS_DIV1;

      /* APB2 = AHB not divided */
      RCC->GCFGR |= (uint32_t)RCC_GCFGR_APB2PS_DIV1;

      /* APB1 = AHB not divided */
      RCC->GCFGR |= (uint32_t)RCC_GCFGR_APB1PS_DIV1;

/* PLL configuration = HSI/2 * 12 = 48 MHz */
RCC->GCFGR &= (uint32_t)((uint32_t)~(RCC_GCFGR_PLLSEL | RCC_GCFGR_PLLPREDV | RCC_GCFGR_PLLMF));
RCC->GCFGR |= (uint32_t)(RCC_GCFGR_PLLSEL_HSI_DIV2 | RCC_GCFGR_PLLMF12);

/* Enable PLL */
RCC->GCCR |= RCC_GCCR_PLLEN;

/* Wait till PLL is ready */
while((RCC->GCCR & RCC_GCCR_PLLSTB) == 0)
{
}

/* Select PLL as system clock source */
RCC->GCFGR &= (uint32_t)((uint32_t)~(RCC_GCFGR_SCS));
RCC->GCFGR |= (uint32_t)RCC_GCFGR_SCS_PLL;

/* Wait till PLL is used as system clock source */
while ((RCC->GCFGR & (uint32_t)RCC_GCFGR_SCSS) != (uint32_t)RCC_GCFGR_SCSS_PLL)
{
}
}
else
{ /* If HSE fails to start-up, the application will have wrong clock
      configuration. User can add here some code to deal with this error */
}
}