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小弟有一个S3C2410的地址h文件，内部有一地方写道：<br />// USB DEVICE<br />#ifdef __BIG_ENDIAN<br /><ERROR IF BIG_ENDIAN><br />#define rFUNC_ADDR_REG (*(volatile unsigned char *)0x52000143) //Function address<br />#define rPWR_REG (*(volatile unsigned char *)0x52000147) //Power management<br />#define rEP_INT_REG (*(volatile unsigned char *)0x5200014b) //EP Interrupt pending and clear<br />#define rUSB_INT_REG (*(volatile unsigned char *)0x5200015b) //USB Interrupt pending and clear<br />#define rEP_INT_EN_REG (*(volatile unsigned char *)0x5200015f) //Interrupt enable<br />#define rUSB_INT_EN_REG (*(volatile unsigned char *)0x5200016f)<br />#define rFRAME_NUM1_REG (*(volatile unsigned char *)0x52000173) //Frame number lower byte<br />#define rFRAME_NUM2_REG (*(volatile unsigned char *)0x52000177) //Frame number higher byte<br />#define rINDEX_REG (*(volatile unsigned char *)0x5200017b) //Register index<br />#define rMAXP_REG (*(volatile unsigned char *)0x52000183) //Endpoint max packet<br />#define rEP0_CSR (*(volatile unsigned char *)0x52000187) //Endpoint 0 status<br />#define rIN_CSR1_REG (*(volatile unsigned char *)0x52000187) //In endpoint control status<br />#define rIN_CSR2_REG (*(volatile unsigned char *)0x5200018b)<br />#define rOUT_CSR1_REG (*(volatile unsigned char *)0x52000193) //Out endpoint control status<br />#define rOUT_CSR2_REG (*(volatile unsigned char *)0x52000197)<br />#define rOUT_FIFO_CNT1_REG (*(volatile unsigned char *)0x5200019b) //Endpoint out write count<br />#define rOUT_FIFO_CNT2_REG (*(volatile unsigned char *)0x5200019f)<br />#define rEP0_FIFO (*(volatile unsigned char *)0x520001c3) //Endpoint 0 FIFO<br />#define rEP1_FIFO (*(volatile unsigned char *)0x520001c7) //Endpoint 1 FIFO<br />#define rEP2_FIFO (*(volatile unsigned char *)0x520001cb) //Endpoint 2 FIFO<br />#define rEP3_FIFO (*(volatile unsigned char *)0x520001cf) //Endpoint 3 FIFO<br />#define rEP4_FIFO (*(volatile unsigned char *)0x520001d3) //Endpoint 4 FIFO<br />#define rEP1_DMA_CON (*(volatile unsigned char *)0x52000203) //EP1 DMA interface control<br />#define rEP1_DMA_UNIT (*(volatile unsigned char *)0x52000207) //EP1 DMA Tx unit counter<br />#define rEP1_DMA_FIFO (*(volatile unsigned char *)0x5200020b) //EP1 DMA Tx FIFO counter<br />#define rEP1_DMA_TTC_L (*(volatile unsigned char *)0x5200020f) //EP1 DMA total Tx counter<br />#define rEP1_DMA_TTC_M (*(volatile unsigned char *)0x52000213)<br />#define rEP1_DMA_TTC_H (*(volatile unsigned char *)0x52000217)<br />#define rEP2_DMA_CON (*(volatile unsigned char *)0x5200021b) //EP2 DMA interface control<br />#define rEP2_DMA_UNIT (*(volatile unsigned char *)0x5200021f) //EP2 DMA Tx unit counter<br />#define rEP2_DMA_FIFO (*(volatile unsigned char *)0x52000223) //EP2 DMA Tx FIFO counter<br />#define rEP2_DMA_TTC_L (*(volatile unsigned char *)0x52000227) //EP2 DMA total Tx counter<br />#define rEP2_DMA_TTC_M (*(volatile unsigned char *)0x5200022b)<br />#define rEP2_DMA_TTC_H (*(volatile unsigned char *)0x5200022f)<br />#define rEP3_DMA_CON (*(volatile unsigned char *)0x52000243) //EP3 DMA interface control<br />#define rEP3_DMA_UNIT (*(volatile unsigned char *)0x52000247) //EP3 DMA Tx unit counter<br />#define rEP3_DMA_FIFO (*(volatile unsigned char *)0x5200024b) //EP3 DMA Tx FIFO counter<br />#define rEP3_DMA_TTC_L (*(volatile unsigned char *)0x5200024f) //EP3 DMA total Tx counter<br />#define rEP3_DMA_TTC_M (*(volatile unsigned char *)0x52000253)<br />#define rEP3_DMA_TTC_H (*(volatile unsigned char *)0x52000257)<br />#define rEP4_DMA_CON (*(volatile unsigned char *)0x5200025b) //EP4 DMA interface control<br />#define rEP4_DMA_UNIT (*(volatile unsigned char *)0x5200025f) //EP4 DMA Tx unit counter<br />#define rEP4_DMA_FIFO (*(volatile unsigned char *)0x52000263) //EP4 DMA Tx FIFO counter<br />#define rEP4_DMA_TTC_L (*(volatile unsigned char *)0x52000267) //EP4 DMA total Tx counter<br />#define rEP4_DMA_TTC_M (*(volatile unsigned char *)0x5200026b)<br />#define rEP4_DMA_TTC_H (*(volatile unsigned char *)0x5200026f)<br />#else // Little Endian<br />#define rFUNC_ADDR_REG (*(volatile unsigned char *)0x52000140) //Function address<br />#define rPWR_REG (*(volatile unsigned char *)0x52000144) //Power management<br />#define rEP_INT_REG (*(volatile unsigned char *)0x52000148) //EP Interrupt pending and clear<br />#define rUSB_INT_REG (*(volatile unsigned char *)0x52000158) //USB Interrupt pending and clear<br />#define rEP_INT_EN_REG (*(volatile unsigned char *)0x5200015c) //Interrupt enable<br />#define rUSB_INT_EN_REG (*(volatile unsigned char *)0x5200016c)<br />#define rFRAME_NUM1_REG (*(volatile unsigned char *)0x52000170) //Frame number lower byte<br />#define rFRAME_NUM2_REG (*(volatile unsigned char *)0x52000174) //Frame number higher byte<br />#define rINDEX_REG (*(volatile unsigned char *)0x52000178) //Register index<br />#define rMAXP_REG (*(volatile unsigned char *)0x52000180) //Endpoint max packet<br />#define rEP0_CSR (*(volatile unsigned char *)0x52000184) //Endpoint 0 status<br />#define rIN_CSR1_REG (*(volatile unsigned char *)0x52000184) //In endpoint control status<br />#define rIN_CSR2_REG (*(volatile unsigned char *)0x52000188)<br />#define rOUT_CSR1_REG (*(volatile unsigned char *)0x52000190) //Out endpoint control status<br />#define rOUT_CSR2_REG (*(volatile unsigned char *)0x52000194)<br />#define rOUT_FIFO_CNT1_REG (*(volatile unsigned char *)0x52000198) //Endpoint out write count<br />#define rOUT_FIFO_CNT2_REG (*(volatile unsigned char *)0x5200019c)<br />#define rEP0_FIFO (*(volatile unsigned char *)0x520001c0) //Endpoint 0 FIFO<br />#define rEP1_FIFO (*(volatile unsigned char *)0x520001c4) //Endpoint 1 FIFO<br />#define rEP2_FIFO (*(volatile unsigned char *)0x520001c8) //Endpoint 2 FIFO<br />#define rEP3_FIFO (*(volatile unsigned char *)0x520001cc) //Endpoint 3 FIFO<br />#define rEP4_FIFO (*(volatile unsigned char *)0x520001d0) //Endpoint 4 FIFO<br />#define rEP1_DMA_CON (*(volatile unsigned char *)0x52000200) //EP1 DMA interface control<br />#define rEP1_DMA_UNIT (*(volatile unsigned char *)0x52000204) //EP1 DMA Tx unit counter<br />#define rEP1_DMA_FIFO (*(volatile unsigned char *)0x52000208) //EP1 DMA Tx FIFO counter<br />#define rEP1_DMA_TTC_L (*(volatile unsigned char *)0x5200020c) //EP1 DMA total Tx counter<br />#define rEP1_DMA_TTC_M (*(volatile unsigned char *)0x52000210)<br />#define rEP1_DMA_TTC_H (*(volatile unsigned char *)0x52000214)<br />#define rEP2_DMA_CON (*(volatile unsigned char *)0x52000218) //EP2 DMA interface control<br />#define rEP2_DMA_UNIT (*(volatile unsigned char *)0x5200021c) //EP2 DMA Tx unit counter<br />#define rEP2_DMA_FIFO (*(volatile unsigned char *)0x52000220) //EP2 DMA Tx FIFO counter<br />#define rEP2_DMA_TTC_L (*(volatile unsigned char *)0x52000224) //EP2 DMA total Tx counter<br />#define rEP2_DMA_TTC_M (*(volatile unsigned char *)0x52000228)<br />#define rEP2_DMA_TTC_H (*(volatile unsigned char *)0x5200022c)<br />#define rEP3_DMA_CON (*(volatile unsigned char *)0x52000240) //EP3 DMA interface control<br />#define rEP3_DMA_UNIT (*(volatile unsigned char *)0x52000244) //EP3 DMA Tx unit counter<br />#define rEP3_DMA_FIFO (*(volatile unsigned char *)0x52000248) //EP3 DMA Tx FIFO counter<br />#define rEP3_DMA_TTC_L (*(volatile unsigned char *)0x5200024c) //EP3 DMA total Tx counter<br />#define rEP3_DMA_TTC_M (*(volatile unsigned char *)0x52000250)<br />#define rEP3_DMA_TTC_H (*(volatile unsigned char *)0x52000254)<br />#define rEP4_DMA_CON (*(volatile unsigned char *)0x52000258) //EP4 DMA interface control<br />#define rEP4_DMA_UNIT (*(volatile unsigned char *)0x5200025c) //EP4 DMA Tx unit counter<br />#define rEP4_DMA_FIFO (*(volatile unsigned char *)0x52000260) //EP4 DMA Tx FIFO counter<br />#define rEP4_DMA_TTC_L (*(volatile unsigned char *)0x52000264) //EP4 DMA total Tx counter<br />#define rEP4_DMA_TTC_M (*(volatile unsigned char *)0x52000268)<br />#define rEP4_DMA_TTC_H (*(volatile unsigned char *)0x5200026c)<br />#endif<br /><br />请问，那个<ERROR IF BIG_ENDIAN>是什么意思？<br /><br />谢谢！ |
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