Fixed-Function Components
When configured to use the FF block in the device, the Counter component has the following
restrictions:
The count input must be a digital clock from the clock system.
If the frequency of the clock is to be the same as bus clock, the clock must actually be the
bus clock.
Open the Configure dialog of the appropriate Clock component to configure the Clock Type
parameter as Existing and the Source parameter as BUS_CLK. A clock at this frequency
cannot be divided from any other source, such as the master clock, IMO, and so on.
所以用个 UDB的Counter 吧
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