High-Density Programmable FIFO Memory For Use in Video and Imaging Applications
用于视频和图像领域的高密度可编程FIFO存储器
By Sivashankar M and Harsha Venkatesh， Cypress Semiconductor Corp.
作者：Sivashankar M 和 Harsha Venkatesh，赛普拉斯半导体
Many market segments， including video broadcasting， military， medical imaging， and base stations， can benefit from the use of high-density FIFO devices solutions have programmable features. In addition to providing significant cost savings and improved video quality compared to SDRAM + FPGA architectures， high-density FIFOs design complexity and cost can be further mitigated using system-level programmability.
许多市场领域（包括视频广播、军事、医学影像、基站）都得益于高密度FIFO器件方案的使用，其具有可编程的特点。并且比较SDRAM + FPGA体系结构可以显著节省成本和改进视频质量，使用系统级编程，可以使高密度FIFO设计更简单，成本更低。
In this article， we will first consider a few video applications to have an understanding of the data path and nature of data handling required. As a next step， we will try to estimate the complexity of handling data in any video processing pipeline. A programmable high-density FIFO is then introduced with its capabilities and how it can act as a more efficient alternative to the current conventional implementation of frame buffers using SDRAM and FPGAs.
在这篇**中，我们将首先介绍几个视频应用，了解其数据路径及需要处理的数据性质。下一步，我们将尽力估计在视频处理通道中操作数据的复杂性。然后会介绍可编程高密度FIFO和其性能，以及它如何能更有效率的替代当前传统的使用SDRAM和FPGA实现帧缓存的方案 |
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