- /**************************************************************************//**
- * [url=home.php?mod=space&uid=288409]@file[/url] main.c
- * [url=home.php?mod=space&uid=895143]@version[/url] V3.00
- * $Revision: 2 $
- * $Date: 16/10/25 4:29p $
- * [url=home.php?mod=space&uid=247401]@brief[/url] 演示如何使用PWM0 CH5 生成2HZ方波驱动LED
- * @note
- * Copyright (C) 2016 Nuvoton Technology Corp. All rights reserved.
- *
- ******************************************************************************/
- #include <stdio.h>
- #include "NUC029xGE.h"
- /*---------------------------------------------------------------------------------------------------------*/
- /* Macro, type and constant definitions */
- /*---------------------------------------------------------------------------------------------------------*/
- #define PLL_CLOCK 144000000
- /*---------------------------------------------------------------------------------------------------------*/
- /* Global variables */
- /*---------------------------------------------------------------------------------------------------------*/
- void SYS_Init(void)
- {
- /*---------------------------------------------------------------------------------------------------------*/
- /* Init System Clock */
- /*---------------------------------------------------------------------------------------------------------*/
- /* Enable HIRC clock (Internal RC 22.1184MHz) */
- CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
- /* Waiting for HIRC clock ready */
- CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
- /* Select HCLK clock source as HIRC and and HCLK clock divider as 1 */
- CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
- /* Enable HXT clock (external XTAL 12MHz) */
- CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
- /* Waiting for HXT clock ready */
- CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
- /* Set core clock as PLL_CLOCK from PLL */
- CLK_SetCoreClock(PLL_CLOCK);
- /* Waiting for PLL clock ready */
- CLK_WaitClockReady(CLK_STATUS_PLLSTB_Msk);
- /* Enable PWM0 module clock */
- CLK_EnableModuleClock(PWM0_MODULE);
- /*---------------------------------------------------------------------------------------------------------*/
- /* PWM clock frequency configuration */
- /*---------------------------------------------------------------------------------------------------------*/
- /* Select HCLK clock source as PLL and and HCLK clock divider as 2 */
- CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_PLL, CLK_CLKDIV0_HCLK(2));
- /* PWM clock frequency can be set equal or double to HCLK by choosing case 1 or case 2 */
- /* case 1.PWM clock frequency is set equal to HCLK: select PWM module clock source as PCLK */
- CLK_SetModuleClock(PWM0_MODULE, CLK_CLKSEL1_PWM0SEL_PCLK0, NULL);
- /* case 2.PWM clock frequency is set double to HCLK: select PWM module clock source as PLL */
- //CLK_SetModuleClock(PWM0_MODULE, CLK_CLKSEL1_PWM0SEL_PLL, NULL);
- /*---------------------------------------------------------------------------------------------------------*/
- /* Enable UART module clock */
- CLK_EnableModuleClock(UART0_MODULE);
- /* Select UART module clock source as HXT and UART module clock divider as 1 */
- CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UARTSEL_HXT, CLK_CLKDIV0_UART(1));
- /* Reset PWM0 module */
- SYS_ResetModule(PWM0_RST);
- /* Update System Core Clock */
- SystemCoreClockUpdate();
- /*---------------------------------------------------------------------------------------------------------*/
- /* Init I/O Multi-function */
- /*---------------------------------------------------------------------------------------------------------*/
- /* Set multi-function pins for UART0 RXD and TXD */
- SYS->GPA_MFPL &= ~(SYS_GPA_MFPL_PA2MFP_Msk | SYS_GPA_MFPL_PA3MFP_Msk);
- SYS->GPA_MFPL |= (SYS_GPA_MFPL_PA3MFP_UART0_RXD | SYS_GPA_MFPL_PA2MFP_UART0_TXD);
- /* Set PC multi-function pins for PWM0 Channel 5 */
- SYS->GPC_MFPL &= ~SYS_GPC_MFPL_PC5MFP_Msk;
- SYS->GPC_MFPL |=SYS_GPC_MFPL_PC5MFP_PWM0_CH5;
- }
- void UART0_Init()
- {
- /*---------------------------------------------------------------------------------------------------------*/
- /* Init UART */
- /*---------------------------------------------------------------------------------------------------------*/
- /* Reset UART module */
- SYS_ResetModule(UART0_RST);
- /* Configure UART0 and set UART0 baud rate */
- UART_Open(UART0, 115200);
- }
- /*---------------------------------------------------------------------------------------------------------*/
- /* Main Function */
- /*---------------------------------------------------------------------------------------------------------*/
- int32_t main(void)
- {
- /* Init System, IP clock and multi-function I/O
- In the end of SYS_Init() will issue SYS_LockReg()
- to lock protected register. If user want to write
- protected register, please issue SYS_UnlockReg()
- to unlock protected register if necessary */
- /* Unlock protected registers */
- SYS_UnlockReg();
- /* Init System, IP clock and multi-function I/O */
- SYS_Init();
- /* Lock protected registers */
- SYS_LockReg();
- /* Init UART to 115200-8n1 for print message */
- UART0_Init();
- printf("\n\nCPU @ %dHz(PLL@ %dHz)\n", SystemCoreClock, PllClock);
- printf("PWM0 clock is from %s\n", (CLK->CLKSEL1 & CLK_CLKSEL1_PWM0SEL_Msk) ? "CPU" : "PLL");
- printf("+------------------------------------------------------------------------+\n");
- printf("| LED Sample Code |\n");
- printf("| |\n");
- /* PWM0 channel 5 frequency is 2Hz, duty 50% */
- PWM_ConfigOutputChannel(PWM0, 5, 2, 50);
- /* Enable output of PWM0 channel 5 */
- PWM_EnableOutput(PWM0, BIT5);
- /* Start */
- PWM_Start(PWM0, BIT5);
- while(1);
- }
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