[MM32生态] 使用 rt-thread env 构建开源免费的 mm32f3270 开发环境

/**

  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************

  * [url=home.php?mod=space&uid=288409]@file[/url]      startup_mm32f3273g9p.s

  * [url=home.php?mod=space&uid=187600]@author[/url]    MCD Application Team

  * [url=home.php?mod=space&uid=247401]@brief[/url]     MM32F3273G9PDevices vector table for Atollic toolchain.

  *            This module performs:

  *                - Set the initial SP

  *                - Set the initial PC == Reset_Handler,

  *                - Set the vector table entries with the exceptions ISR address

  *                - Configure the clock system   

  *                - Configure external SRAM mounted on MM32F3273G9P EVAL board

  *                  to be used as data memory (optional, to be enabled by user)

  *                - Branches to main in the C library (which eventually

  *                  calls main()).

  *            After Reset the Cortex-M3 processor is in Thread mode,

  *            priority is Privileged, and the Stack is set to Main.

  ******************************************************************************

  * @attention

  *

  * <h2><center>© Copyright (c) 2017 STMicroelectronics.

  * All rights reserved.</center></h2>

  *

  * This software component is licensed by ST under BSD 3-Clause license,

  * the "License"; You may not use this file except in compliance with the

  * License. You may obtain a copy of the License at:

  *                        opensource.org/licenses/BSD-3-Clause

  *

  ******************************************************************************

  */



  .syntax unified

  .cpu cortex-m3

  .fpu softvfp

  .thumb



.global g_pfnVectors

.global Default_Handler



/* start address for the initialization values of the .data section.

defined in linker script */

.word _sidata

/* start address for the .data section. defined in linker script */

.word _sdata

/* end address for the .data section. defined in linker script */

.word _edata

/* start address for the .bss section. defined in linker script */

.word _sbss

/* end address for the .bss section. defined in linker script */

.word _ebss



.equ  BootRAM,        0xF1E0F85F

/**

 * [url=home.php?mod=space&uid=247401]@brief[/url]  This is the code that gets called when the processor first

 *          starts execution following a reset event. Only the absolutely

 *          necessary set is performed, after which the application

 *          supplied main() routine is called.

 * @param  None

 * @retval : None

*/



  .section .text.Reset_Handler

  .weak Reset_Handler

  .type Reset_Handler, %function

Reset_Handler:



/* Copy the data segment initializers from flash to SRAM */

  movs r1, #0

  b LoopCopyDataInit



CopyDataInit:

  ldr r3, =_sidata

  ldr r3, [r3, r1]

  str r3, [r0, r1]

  adds r1, r1, #4



LoopCopyDataInit:

  ldr r0, =_sdata

  ldr r3, =_edata

  adds r2, r0, r1

  cmp r2, r3

  bcc CopyDataInit

  ldr r2, =_sbss

  b LoopFillZerobss

/* Zero fill the bss segment. */

FillZerobss:

  movs r3, #0

  str r3, [r2], #4



LoopFillZerobss:

  ldr r3, = _ebss

  cmp r2, r3

  bcc FillZerobss



/* Call the clock system intitialization function.*/

    bl  SystemInit

/* Call static constructors */

    bl __libc_init_array

/* Call the application's entry point.*/

  bl entry

  bx lr

.size Reset_Handler, .-Reset_Handler



/**

 * @brief  This is the code that gets called when the processor receives an

 *         unexpected interrupt.  This simply enters an infinite loop, preserving

 *         the system state for examination by a debugger.

 *

 * @param  None

 * @retval : None

*/

    .section .text.Default_Handler,"ax",%progbits

Default_Handler:

Infinite_Loop:

  b Infinite_Loop

  .size Default_Handler, .-Default_Handler

/******************************************************************************

*

* The minimal vector table for a Cortex M3.  Note that the proper constructs

* must be placed on this to ensure that it ends up at physical address

* 0x0000.0000.

*

******************************************************************************/

  .section .isr_vector,"a",%progbits

  .type g_pfnVectors, %object

  .size g_pfnVectors, .-g_pfnVectors





g_pfnVectors:



  .word _estack

  .word Reset_Handler

  .word NMI_Handler

  .word HardFault_Handler

  .word MemManage_Handler

  .word BusFault_Handler

  .word UsageFault_Handler

  .word 0

  .word 0

  .word 0

  .word 0

  .word SVC_Handler

  .word DebugMon_Handler

  .word 0

  .word PendSV_Handler

  .word SysTick_Handler

  .word WWDG_IRQHandler

  .word PVD_IRQHandler

  .word TAMPER_IRQHandler

  .word RTC_IRQHandler

  .word FLASH_IRQHandler

  .word RCC_CRS_IRQHandler

  .word EXTI0_IRQHandler

  .word EXTI1_IRQHandler

  .word EXTI2_IRQHandler

  .word EXTI3_IRQHandler

  .word EXTI4_IRQHandler

  .word DMA1_Channel1_IRQHandler

  .word DMA1_Channel2_IRQHandler

  .word DMA1_Channel3_IRQHandler

  .word DMA1_Channel4_IRQHandler

  .word DMA1_Channel5_IRQHandler

  .word DMA1_Channel6_IRQHandler

  .word DMA1_Channel7_IRQHandler

  .word ADC1_2_IRQHandler

  .word FlashCache_IRQHandler

  .word 0

  .word CAN1_RX_IRQHandler

  .word 0

  .word EXTI9_5_IRQHandler

  .word TIM1_BRK_IRQHandler

  .word TIM1_UP_IRQHandler

  .word TIM1_TRG_COM_IRQHandler

  .word TIM1_CC_IRQHandler

  .word TIM2_IRQHandler

  .word TIM3_IRQHandler

  .word TIM4_IRQHandler

  .word I2C1_IRQHandler

  .word 0

  .word I2C2_IRQHandler

  .word 0

  .word SPI1_IRQHandler

  .word SPI2_IRQHandler

  .word UART1_IRQHandler

  .word UART2_IRQHandler

  .word UART3_IRQHandler

  .word EXTI15_10_IRQHandler

  .word RTCAlarm_IRQHandler

  .word OTG_FS_WKUP_IRQHandler

  .word TIM8_BRK_IRQHandler

  .word TIM8_UP_IRQHandler

  .word TIM8_TRG_COM_IRQHandler

  .word TIM8_CC_IRQHandler

  .word ADC3_IRQHandler

  .word 0

  .word SDIO_IRQHandler

  .word TIM5_IRQHandler

  .word SPI3_IRQHandler

  .word UART4_IRQHandler

  .word UART5_IRQHandler

  .word TIM6_IRQHandler

  .word TIM7_IRQHandler

  .word DMA2_Channel1_IRQHandler

  .word DMA2_Channel2_IRQHandler

  .word DMA2_Channel3_IRQHandler

  .word DMA2_Channel4_IRQHandler

  .word DMA2_Channel5_IRQHandler

  .word ETH_IRQHandler

  .word 0

  .word 0

  .word COMP1_2_IRQHandler

  .word 0

  .word 0

  .word OTG_FS_IRQHandler

  .word 0

  .word 0

  .word 0

  .word UART6_IRQHandler

  .word 0

  .word 0

  .word 0

  .word 0

  .word 0

  .word 0

  .word 0

  .word 0

  .word 0

  .word 0

  .word UART7_IRQHandler

  .word UART8_IRQHandler

  .word BootRAM       



/*******************************************************************************

*

* Provide weak aliases for each Exception handler to the Default_Handler.

* As they are weak aliases, any function with the same name will override

* this definition.

*

*******************************************************************************/



  .weak NMI_Handler

  .thumb_set NMI_Handler,Default_Handler



  .weak HardFault_Handler

  .thumb_set HardFault_Handler,Default_Handler



  .weak MemManage_Handler

  .thumb_set MemManage_Handler,Default_Handler



  .weak BusFault_Handler

  .thumb_set BusFault_Handler,Default_Handler



  .weak UsageFault_Handler

  .thumb_set UsageFault_Handler,Default_Handler



  .weak SVC_Handler

  .thumb_set SVC_Handler,Default_Handler



  .weak DebugMon_Handler

  .thumb_set DebugMon_Handler,Default_Handler



  .weak PendSV_Handler

  .thumb_set PendSV_Handler,Default_Handler



  .weak SysTick_Handler

  .thumb_set SysTick_Handler,Default_Handler



  .weak WWDG_IRQHandler

  .thumb_set WWDG_IRQHandler,Default_Handler



  .weak PVD_IRQHandler

  .thumb_set PVD_IRQHandler,Default_Handler



  .weak TAMPER_IRQHandler

  .thumb_set TAMPER_IRQHandler,Default_Handler



  .weak RTC_IRQHandler

  .thumb_set RTC_IRQHandler,Default_Handler



  .weak FLASH_IRQHandler

  .thumb_set FLASH_IRQHandler,Default_Handler



  .weak RCC_CRS_IRQHandler

  .thumb_set RCC_CRS_IRQHandler,Default_Handler



  .weak EXTI0_IRQHandler

  .thumb_set EXTI0_IRQHandler,Default_Handler



  .weak EXTI1_IRQHandler

  .thumb_set EXTI1_IRQHandler,Default_Handler



  .weak EXTI2_IRQHandler

  .thumb_set EXTI2_IRQHandler,Default_Handler



  .weak EXTI3_IRQHandler

  .thumb_set EXTI3_IRQHandler,Default_Handler



  .weak EXTI4_IRQHandler

  .thumb_set EXTI4_IRQHandler,Default_Handler



  .weak DMA1_Channel1_IRQHandler

  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler



  .weak DMA1_Channel2_IRQHandler

  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler



  .weak DMA1_Channel3_IRQHandler

  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler



  .weak DMA1_Channel4_IRQHandler

  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler



  .weak DMA1_Channel5_IRQHandler

  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler



  .weak DMA1_Channel6_IRQHandler

  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler



  .weak DMA1_Channel7_IRQHandler

  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler



  .weak ADC1_2_IRQHandler

  .thumb_set ADC1_2_IRQHandler,Default_Handler



  .weak FlashCache_IRQHandler

  .thumb_set FlashCache_IRQHandler,Default_Handler



  .weak CAN1_RX_IRQHandler

  .thumb_set CAN1_RX_IRQHandler,Default_Handler



  .weak EXTI9_5_IRQHandler

  .thumb_set EXTI9_5_IRQHandler,Default_Handler



  .weak TIM1_BRK_IRQHandler

  .thumb_set TIM1_BRK_IRQHandler,Default_Handler



  .weak TIM1_UP_IRQHandler

  .thumb_set TIM1_UP_IRQHandler,Default_Handler



  .weak TIM1_TRG_COM_IRQHandler

  .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler



  .weak TIM1_CC_IRQHandler

  .thumb_set TIM1_CC_IRQHandler,Default_Handler



  .weak TIM2_IRQHandler

  .thumb_set TIM2_IRQHandler,Default_Handler



  .weak TIM3_IRQHandler

  .thumb_set TIM3_IRQHandler,Default_Handler



  .weak TIM4_IRQHandler

  .thumb_set TIM4_IRQHandler,Default_Handler



  .weak I2C1_IRQHandler

  .thumb_set I2C1_IRQHandler,Default_Handler



  .weak I2C2_IRQHandler

  .thumb_set I2C2_IRQHandler,Default_Handler



  .weak SPI1_IRQHandler

  .thumb_set SPI1_IRQHandler,Default_Handler



  .weak SPI2_IRQHandler

  .thumb_set SPI2_IRQHandler,Default_Handler



  .weak UART1_IRQHandler

  .thumb_set UART1_IRQHandler,Default_Handler



  .weak UART2_IRQHandler

  .thumb_set UART2_IRQHandler,Default_Handler



  .weak UART3_IRQHandler

  .thumb_set UART3_IRQHandler,Default_Handler



  .weak EXTI15_10_IRQHandler

  .thumb_set EXTI15_10_IRQHandler,Default_Handler



  .weak RTCAlarm_IRQHandler

  .thumb_set RTCAlarm_IRQHandler,Default_Handler



  .weak OTG_FS_WKUP_IRQHandler

  .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler



  .weak TIM8_BRK_IRQHandler

  .thumb_set TIM8_BRK_IRQHandler,Default_Handler



  .weak TIM8_UP_IRQHandler

  .thumb_set TIM8_UP_IRQHandler,Default_Handler



  .weak TIM8_TRG_COM_IRQHandler

  .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler



  .weak TIM8_CC_IRQHandler

  .thumb_set TIM8_CC_IRQHandler,Default_Handler



  .weak ADC3_IRQHandler

  .thumb_set ADC3_IRQHandler,Default_Handler



  .weak SDIO_IRQHandler

  .thumb_set SDIO_IRQHandler,Default_Handler



  .weak TIM5_IRQHandler

  .thumb_set TIM5_IRQHandler,Default_Handler



  .weak SPI3_IRQHandler

  .thumb_set SPI3_IRQHandler,Default_Handler



  .weak UART4_IRQHandler

  .thumb_set UART4_IRQHandler,Default_Handler



  .weak UART5_IRQHandler

  .thumb_set UART5_IRQHandler,Default_Handler



  .weak TIM6_IRQHandler

  .thumb_set TIM6_IRQHandler,Default_Handler



  .weak TIM7_IRQHandler

  .thumb_set TIM7_IRQHandler,Default_Handler



  .weak DMA2_Channel1_IRQHandler

  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler



  .weak DMA2_Channel2_IRQHandler

  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler



  .weak DMA2_Channel3_IRQHandler

  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler



  .weak DMA2_Channel4_IRQHandler

  .thumb_set DMA2_Channel4_IRQHandler,Default_Handler



  .weak DMA2_Channel5_IRQHandler

  .thumb_set DMA2_Channel5_IRQHandler,Default_Handler



  .weak ETH_IRQHandler

  .thumb_set ETH_IRQHandler,Default_Handler



  .weak COMP1_2_IRQHandler

  .thumb_set COMP1_2_IRQHandler,Default_Handler



  .weak OTG_FS_IRQHandler

  .thumb_set OTG_FS_IRQHandler,Default_Handler



  .weak UART6_IRQHandler

  .thumb_set UART6_IRQHandler,Default_Handler



  .weak UART7_IRQHandler

  .thumb_set UART7_IRQHandler,Default_Handler



  .weak UART8_IRQHandler

  .thumb_set UART8_IRQHandler,Default_Handler



/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

/*

 * linker script for MM32F3273 with GNU ld

 */



/* Program Entry, set to mark it as "used" and avoid gc */

MEMORY

{

    ROM (rx) : ORIGIN = 0x08000000, LENGTH = 512k /* 512KB flash */

    RAM (rw) : ORIGIN = 0x20000000, LENGTH = 128k /* 128KB sram */

}

ENTRY(Reset_Handler)

_system_stack_size = 0x800;



SECTIONS

{

    .text :

    {

        . = ALIGN(4);

        _stext = .;

        KEEP(*(.isr_vector))            /* Startup code */



        . = ALIGN(4);

        *(.text)                        /* remaining code */

        *(.text.*)                      /* remaining code */

        *(.rodata)                      /* read-only data (constants) */

        *(.rodata*)

        *(.glue_7)

        *(.glue_7t)

        *(.gnu.linkonce.t*)



        /* section information for finsh shell */

        . = ALIGN(4);

        __fsymtab_start = .;

        KEEP(*(FSymTab))

        __fsymtab_end = .;



        . = ALIGN(4);

        __vsymtab_start = .;

        KEEP(*(VSymTab))

        __vsymtab_end = .;



        /* section information for initial. */

        . = ALIGN(4);

        __rt_init_start = .;

        KEEP(*(SORT(.rti_fn*)))

        __rt_init_end = .;



        . = ALIGN(4);



        PROVIDE(__ctors_start__ = .);

        KEEP (*(SORT(.init_array.*)))

        KEEP (*(.init_array))

        PROVIDE(__ctors_end__ = .);



        . = ALIGN(4);



        _etext = .;

    } > ROM = 0



    /* .ARM.exidx is sorted, so has to go in its own output section.  */

    __exidx_start = .;

    .ARM.exidx :

    {

        *(.ARM.exidx* .gnu.linkonce.armexidx.*)



        /* This is used by the startup in order to initialize the .data secion */

        _sidata = .;

    } > ROM

    __exidx_end = .;



    /* .data section which is used for initialized data */



    .data : AT (_sidata)

    {

        . = ALIGN(4);

        /* This is used by the startup in order to initialize the .data secion */

        _sdata = . ;



        *(.data)

        *(.data.*)

        *(.gnu.linkonce.d*)



        PROVIDE(__dtors_start__ = .);

        KEEP(*(SORT(.dtors.*)))

        KEEP(*(.dtors))

        PROVIDE(__dtors_end__ = .);



        . = ALIGN(4);

        /* This is used by the startup in order to initialize the .data secion */

        _edata = . ;

    } >RAM



    .stack : 

    {

        . = ALIGN(4);

        _sstack = .;

        . = . + _system_stack_size;

        . = ALIGN(4);

        _estack = .;

    } >RAM



    __bss_start = .;

    .bss :

    {

        . = ALIGN(4);

        /* This is used by the startup in order to initialize the .bss secion */

        _sbss = .;



        *(.bss)

        *(.bss.*)

        *(COMMON)



        . = ALIGN(4);

        /* This is used by the startup in order to initialize the .bss secion */

        _ebss = . ;

        

        *(.bss.init)

    } > RAM

    __bss_end = .;



    _end = .;



    /* Stabs debugging sections.  */

    .stab          0 : { *(.stab) }

    .stabstr       0 : { *(.stabstr) }

    .stab.excl     0 : { *(.stab.excl) }

    .stab.exclstr  0 : { *(.stab.exclstr) }

    .stab.index    0 : { *(.stab.index) }

    .stab.indexstr 0 : { *(.stab.indexstr) }

    .comment       0 : { *(.comment) }

    /* DWARF debug sections.

     * Symbols in the DWARF debugging sections are relative to the beginning

     * of the section so we begin them at 0.  */

    /* DWARF 1 */

    .debug          0 : { *(.debug) }

    .line           0 : { *(.line) }

    /* GNU DWARF 1 extensions */

    .debug_srcinfo  0 : { *(.debug_srcinfo) }

    .debug_sfnames  0 : { *(.debug_sfnames) }

    /* DWARF 1.1 and DWARF 2 */

    .debug_aranges  0 : { *(.debug_aranges) }

    .debug_pubnames 0 : { *(.debug_pubnames) }

    /* DWARF 2 */

    .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }

    .debug_abbrev   0 : { *(.debug_abbrev) }

    .debug_line     0 : { *(.debug_line) }

    .debug_frame    0 : { *(.debug_frame) }

    .debug_str      0 : { *(.debug_str) }

    .debug_loc      0 : { *(.debug_loc) }

    .debug_macinfo  0 : { *(.debug_macinfo) }

    /* SGI/MIPS DWARF 2 extensions */

    .debug_weaknames 0 : { *(.debug_weaknames) }

    .debug_funcnames 0 : { *(.debug_funcnames) }

    .debug_typenames 0 : { *(.debug_typenames) }

    .debug_varnames  0 : { *(.debug_varnames) }

}