LIBRARY IEEE;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
Entity js Is
Port (Clk,Rst,En: in std_logic;
cong,cons,conb,conq: buffer std_logic_vector(3 downto 0) );
End js;
Architecture COUNT of js Is
Begin
process(Rst,Clk)
begin
if Rst = '1' then
cong<="0000";
cons<="0000";
conb<="0000";
conq<="0000";
elsif rising_edge(Clk) then
if En='1' then
cong<=cong;
cons<=cons;
conb<=conb;
conq<=conq;
elsif(cong="1001" and cons="1001" and conb="1001" and conq="1001" )then
cong<="0000";
cons<="0000";
conb<="0000";
conq<="0000";
elsif cong="1001" then
if cons="1001" then
if conb="1001" then
cong<="0000";
cons<="0000";
conb<="0000";
conq<=conq+1;
else cong<="0000";
cons<="0000";
conb<=conb+1;
end if;
else cong<="0000";
cons<=cons+1;
end if;
else cong<=cong+1;
end if;
end if;
end process;
End COUNT;
上面是我参考然后自己改的一个千位的计数代码，综合什么的都没问题，就是仿真的时候结果里面千位全是0 没反应求大神帮忙解决下~~~ |
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