/*!< Interrupt Number Definition */
typedef enum IRQn
{
/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/
NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */
BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */
UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */
SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */
PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */
SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */
/****** GD32 specific Interrupt Numbers *********************************************************/
WWDG_IRQn = 0, /*!< Window WatchDog Interrupt */
LVD_IRQn = 1, /*!< PVD through EXTI Line detection Interrupt */
TAMPER_IRQn = 2, /*!< Tamper Interrupt */
RTC_IRQn = 3, /*!< RTC global Interrupt */
FLASH_IRQn = 4, /*!< FLASH global Interrupt */
RCC_IRQn = 5, /*!< RCC global Interrupt */
EXTI0_IRQn = 6, /*!< EXTI Line0 Interrupt */
EXTI1_IRQn = 7, /*!< EXTI Line1 Interrupt */
EXTI2_IRQn = 8, /*!< EXTI Line2 Interrupt */
EXTI3_IRQn = 9, /*!< EXTI Line3 Interrupt */
EXTI4_IRQn = 10, /*!< EXTI Line4 Interrupt */
DMA1_Channel1_IRQn = 11, /*!< DMA1 Channel 1 global Interrupt */
DMA1_Channel2_IRQn = 12, /*!< DMA1 Channel 2 global Interrupt */
DMA1_Channel3_IRQn = 13, /*!< DMA1 Channel 3 global Interrupt */
DMA1_Channel4_IRQn = 14, /*!< DMA1 Channel 4 global Interrupt */
DMA1_Channel5_IRQn = 15, /*!< DMA1 Channel 5 global Interrupt */
DMA1_Channel6_IRQn = 16, /*!< DMA1 Channel 6 global Interrupt */
DMA1_Channel7_IRQn = 17, /*!< DMA1 Channel 7 global Interrupt */
#ifdef GD32F10X_MD
ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */
USB_HP_CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */
USB_LP_CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */
CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */
CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */
EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */
TIMER1_BRK_IRQn = 24, /*!< TIMER1 Break Interrupt */
TIMER1_UP_IRQn = 25, /*!< TIMER1 Update Interrupt */
TIMER1_TRG_COM_IRQn = 26, /*!< TIMER1 Trigger and Commutation Interrupt */
TIMER1_CC_IRQn = 27, /*!< TIMER1 Capture Compare Interrupt */
TIMER2_IRQn = 28, /*!< TIMER2 global Interrupt */
TIMER3_IRQn = 29, /*!< TIMER3 global Interrupt */
TIMER4_IRQn = 30, /*!< TIMER4 global Interrupt */
I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */
I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */
I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */
I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */
SPI1_IRQn = 35, /*!< SPI1 global Interrupt */
SPI2_IRQn = 36, /*!< SPI2 global Interrupt */
USART1_IRQn = 37, /*!< USART1 global Interrupt */
USART2_IRQn = 38, /*!< USART2 global Interrupt */
USART3_IRQn = 39, /*!< USART3 global Interrupt */
EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
EXMC_IRQn = 48 /*!< EXMC global Interrupt */
#endif /* GD32F10X_MD */
#ifdef GD32F10X_HD
ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */
USB_HP_CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */
USB_LP_CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */
CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */
CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */
EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */
TIMER1_BRK_IRQn = 24, /*!< TIMER1 Break Interrupt */
TIMER1_UP_IRQn = 25, /*!< TIMER1 Update Interrupt */
TIMER1_TRG_COM_IRQn = 26, /*!< TIMER1 Trigger and Commutation Interrupt */
TIMER1_CC_IRQn = 27, /*!< TIMER1 Capture Compare Interrupt */
TIMER2_IRQn = 28, /*!< TIMER2 global Interrupt */
TIMER3_IRQn = 29, /*!< TIMER3 global Interrupt */
TIMER4_IRQn = 30, /*!< TIMER4 global Interrupt */
I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */
I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */
I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */
I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */
SPI1_IRQn = 35, /*!< SPI1 global Interrupt */
SPI2_IRQn = 36, /*!< SPI2 global Interrupt */
USART1_IRQn = 37, /*!< USART1 global Interrupt */
USART2_IRQn = 38, /*!< USART2 global Interrupt */
USART3_IRQn = 39, /*!< USART3 global Interrupt */
EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
TIMER8_BRK_IRQn = 43, /*!< TIMER8 Break Interrupt */
TIMER8_UP_IRQn = 44, /*!< TIMER8 Update Interrupt */
TIMER8_TRG_COM_IRQn = 45, /*!< TIMER8 Trigger and Commutation Interrupt */
TIMER8_CC_IRQn = 46, /*!< TIMER8 Capture Compare Interrupt */
ADC3_IRQn = 47, /*!< ADC3 global Interrupt */
EXMC_IRQn = 48, /*!< EXMC global Interrupt */
SDIO_IRQn = 49, /*!< SDIO global Interrupt */
TIMER5_IRQn = 50, /*!< TIMER5 global Interrupt */
SPI3_IRQn = 51, /*!< SPI3 global Interrupt */
UART4_IRQn = 52, /*!< UART4 global Interrupt */
UART5_IRQn = 53, /*!< UART5 global Interrupt */
TIMER6_IRQn = 54, /*!< TIMER6 global Interrupt */
TIMER7_IRQn = 55, /*!< TIMER7 global Interrupt */
DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */
DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */
DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */
DMA2_Channel4_5_IRQn = 59 /*!< DMA2 Channel 4 and Channel 5 global Interrupt */
#endif /* GD32F10X_HD */
#ifdef GD32F10X_XD
ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */
USB_HP_CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */
USB_LP_CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */
CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */
CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */
EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */
TIMER1_BRK_TIMER9_IRQn = 24, /*!< TIMER1 Break Interrupt and TIMER9 global Interrupt */
TIMER1_UP_TIMER10_IRQn = 25, /*!< TIMER1 Update Interrupt and TIMER10 global Interrupt */
TIMER1_TRG_COM_TIMER11_IRQn = 26, /*!< TIMER1 Trigger and Commutation Interrupt and TIMER11 global interrupt */
TIMER1_CC_IRQn = 27, /*!< TIMER1 Capture Compare Interrupt */
TIMER2_IRQn = 28, /*!< TIMER2 global Interrupt */
TIMER3_IRQn = 29, /*!< TIMER3 global Interrupt */
TIMER4_IRQn = 30, /*!< TIMER4 global Interrupt */
I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */
I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */
I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */
I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */
SPI1_IRQn = 35, /*!< SPI1 global Interrupt */
SPI2_IRQn = 36, /*!< SPI2 global Interrupt */
USART1_IRQn = 37, /*!< USART1 global Interrupt */
USART2_IRQn = 38, /*!< USART2 global Interrupt */
USART3_IRQn = 39, /*!< USART3 global Interrupt */
EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
TIMER8_BRK_TIMER12_IRQn = 43, /*!< TIMER8 Break Interrupt and TIMER12 global Interrupt */
TIMER8_UP_TIMER13_IRQn = 44, /*!< TIMER8 Update Interrupt and TIMER13 global Interrupt */
TIMER8_TRG_COM_TIMER14_IRQn = 45, /*!< TIMER8 Trigger and Commutation Interrupt and TIMER14 global interrupt */
TIMER8_CC_IRQn = 46, /*!< TIMER8 Capture Compare Interrupt */
ADC3_IRQn = 47, /*!< ADC3 global Interrupt */
EXMC_IRQn = 48, /*!< EXMC global Interrupt */
SDIO_IRQn = 49, /*!< SDIO global Interrupt */
TIMER5_IRQn = 50, /*!< TIMER5 global Interrupt */
SPI3_IRQn = 51, /*!< SPI3 global Interrupt */
UART4_IRQn = 52, /*!< UART4 global Interrupt */
UART5_IRQn = 53, /*!< UART5 global Interrupt */
TIMER6_IRQn = 54, /*!< TIMER6 global Interrupt */
TIMER7_IRQn = 55, /*!< TIMER7 global Interrupt */
DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */
DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */
DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */
DMA2_Channel4_5_IRQn = 59 /*!< DMA2 Channel 4 and Channel 5 global Interrupt */
#endif /* GD32F10X_XD */
#ifdef GD32F10X_CL
ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */
CAN1_TX_IRQn = 19, /*!< CAN1 TX Interrupts */
CAN1_RX0_IRQn = 20, /*!< CAN1 RX0 Interrupts */
CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */
CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */
EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */
TIMER1_BRK_TIMER9_IRQn = 24, /*!< TIMER1 Break Interrupt and TIMER9 global Interrupt */
TIMER1_UP_TIMER10_IRQn = 25, /*!< TIMER1 Update Interrupt and TIMER10 global Interrupt */
TIMER1_TRG_COM_TIMER11_IRQn = 26, /*!< TIMER1 Trigger and Commutation Interrupt and TIMER11 global interrupt */
TIMER1_CC_IRQn = 27, /*!< TIMER1 Capture Compare Interrupt */
TIMER2_IRQn = 28, /*!< TIMER2 global Interrupt */
TIMER3_IRQn = 29, /*!< TIMER3 global Interrupt */
TIMER4_IRQn = 30, /*!< TIMER4 global Interrupt */
I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */
I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */
I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */
I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */
SPI1_IRQn = 35, /*!< SPI1 global Interrupt */
SPI2_IRQn = 36, /*!< SPI2 global Interrupt */
USART1_IRQn = 37, /*!< USART1 global Interrupt */
USART2_IRQn = 38, /*!< USART2 global Interrupt */
USART3_IRQn = 39, /*!< USART3 global Interrupt */
EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */
RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */
OTG_FS_WKUP_IRQn = 42, /*!< USB OTG FS WakeUp from suspend through EXTI Line Interrupt */
TIMER8_BRK_TIMER12_IRQn = 43, /*!< TIMER8 Break Interrupt and TIMER12 global Interrupt */
TIMER8_UP_TIMER13_IRQn = 44, /*!< TIMER8 Update Interrupt and TIMER13 global Interrupt */
TIMER8_TRG_COM_TIMER14_IRQn = 45, /*!< TIMER8 Trigger and Commutation Interrupt and TIMER14 global interrupt */
TIMER8_CC_IRQn = 46, /*!< TIMER8 Capture Compare Interrupt */
EXMC_IRQn = 48, /*!< EXMC global Interrupt */
TIMER5_IRQn = 50, /*!< TIMER5 global Interrupt */
SPI3_IRQn = 51, /*!< SPI3 global Interrupt */
UART4_IRQn = 52, /*!< UART4 global Interrupt */
UART5_IRQn = 53, /*!< UART5 global Interrupt */
TIMER6_IRQn = 54, /*!< TIMER6 global Interrupt */
TIMER7_IRQn = 55, /*!< TIMER7 global Interrupt */
DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */
DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */
DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */
DMA2_Channel4_IRQn = 59, /*!< DMA2 Channel 4 global Interrupt */
DMA2_Channel5_IRQn = 60, /*!< DMA2 Channel 5 global Interrupt */
ETH_IRQn = 61, /*!< Ethernet global Interrupt */
ETH_WKUP_IRQn = 62, /*!< Ethernet Wakeup through EXTI line Interrupt */
CAN2_TX_IRQn = 63, /*!< CAN2 TX Interrupt */
CAN2_RX0_IRQn = 64, /*!< CAN2 RX0 Interrupt */
CAN2_RX1_IRQn = 65, /*!< CAN2 RX1 Interrupt */
CAN2_SCE_IRQn = 66, /*!< CAN2 SCE Interrupt */
OTG_FS_IRQn = 67 /*!< USB OTG FS global Interrupt */
#endif /* GD32F10X_CL */
} IRQn_Type;