关于QII和ACTEL 没有用特殊资源

只看该作者 · 2008-3-23 22:10

module tiaoshi(key1,key2,key3,rst,write_en);
input  key1,key2,key3,rst;
output  write_en;
reg      write_en;
always@(posedge key1 or posedge key2 or posedge key3 or posedge rst)
begin
if(rst||key3)
begin
write_en<=1'b0;
end
else
begin
write_en<=1'b1;
end
end
endmodule
就上面这段代码不能通过而且不知道是什么原因错误!如果把write_en设为寄存器不输出,能通过综合,否则不能通过.

只看该作者 · 2008-3-23 23:31

你的代码中key1 key2 没有用到，建议修改代码为
module tiaoshi(key1,key2,key3,rst,write_en);
input  key1,key2,key3,rst;
output  write_en;
reg      write_en;
always@( posedge key3 or posedge rst)
begin
if(rst||key3)
begin
write_en<=1'b0;
end
else
begin
write_en<=1'b1;
end
end
endmodule