#include "S32K144.h" /* include peripheral declarations S32K144 */ #define PTB4 4 /* Port PTB4, bit 4 :FRDM EVB output to red LED*/ #define PTD15 15 /* Port PTD15, bit 15 :FRDM EVB input from BTN0 [SW2]*/ int idle_counter = 0; int PTD15_flag_counter = 0; void init_IRQs (void) { FSL_NVIC->ICPR[1] = 1 << (78 % 32); /* IRQ78-PTD ch0: clr any pending IRQ*/ FSL_NVIC->ISER[1] = 1 << (78 % 32); /* IRQ78-PTD ch0: enable IRQ */ FSL_NVIC->IP[78] = 0xA; /* IRQ78-PTD ch0: priority 10 of 0-15*/ } void Init_ports(void) { /* Enable clocks to peripherals (PORT modules) */ PCC-> PCCn[PCC_PORTB_INDEX] = PCC_PCCn_CGC_MASK; /* Enable clock to PORT B */ PTB->PDDR |= 1<<PTB4; /* Port B4: Data Direction= output */ PORTB->PCR[4] = 0x00000100; /* Port B4: MUX = GPIO */ } void init_Key(void) { /* Configure port D15 as INT input (BTN 0 [SW2] on EVB) */ PCC-> PCCn[PCC_PORTD_INDEX] = PCC_PCCn_CGC_MASK; /* Enable clock to PORT D */ PTD->PDDR &= ~(1<<PTD15); /* Port D15: Data Direction= input (default) */ PORTD->PCR[15] = 0x000A0102; /*Port D15: ISF flag and Interrupt on falling-edge, MUX = GPIO, Pull Enabled */ } void disable_WDOG (void){ WDOG->CNT=0xD928C520; /*Unlock watchdog*/ WDOG->TOVAL=0x0000FFFF; /*Maximum timeout value*/ WDOG->CS = 0x00002100; /*Disable watchdog*/ } int main(void) { disable_WDOG(); Init_ports(); /*Configure ports*/ init_IRQs(); /*Enable GPIO interrupts and priorities*/ init_Key(); /*Initialize PTD15 as GPIO interrupts*/ for(;;) { idle_counter++; } } void PORTD_IRQHandler(void) { PTD15_flag_counter++; PTB->PTOR |= 1<<4; /* Toggle output on port B4 (blue LED) */ PORTD->ISFR &= ~(1<<PTD15); PORTD->PCR[15] |= 0x01000000; } 下面是参考的S32DS提供的定时器中断程序: 复制/* * hello_interrupts.c Copyright NXP 2016 * Description: Minimal interrupt example using LPIT0 chan 0 (vector 64) * 2016 Mar 04 S Mihalik - Initial Version * */ #include "derivative.h" /* include peripheral declarations S32K144 */ #include "clocks_and_modes.h" /* include peripheral declarations S32K144 */ int idle_counter = 0; /* main loop idle counter */ int lpit0_ch0_flag_counter = 0; /* LPIT0 chan 0 timeout counter */ void init_IRQs (void) { FSL_NVIC->ICPR[1] = 1 << (48 % 32); /* IRQ48-LPIT0 ch0: clr any pending IRQ*/ FSL_NVIC->ISER[1] = 1 << (48 % 32); /* IRQ48-LPIT0 ch0: enable IRQ */ FSL_NVIC->IP[48] = 0xA; /* IRQ48-LPIT0 ch0: priority 10 of 0-15*/ } void init_ports (void) { PCC-> PCCn[PCC_PORTB_INDEX] = PCC_PCCn_CGC_MASK; /* Enable clock for PORT B */ PTB->PDDR |= 1<<4; /* Port B4: Data Direction= output */ PORTB->PCR[4] = 0x00000100; /* Port B4: MUX = ALT1, GPIO (to blue LED on EVB) */ } void init_LPIT0 (void) { PCC->PCCn[PCC_LPIT0_INDEX] = PCC_PCCn_PCS(6); /* Clock Src = 6 (SPLL2_DIV2_CLK)*/ PCC->PCCn[PCC_LPIT0_INDEX] |= PCC_PCCn_CGC_MASK; /* Enable clk to LPIT0 regs */ LPIT0->MCR = 0x00000001; /* DBG_EN-0: Timer chans stop in Debug mode */ /* DOZE_EN=0: Timer chans are stopped in DOZE mode */ /* SW_RST=0: SW reset does not reset timer chans, regs */ /* M_CEN=1: enable module clk (allows writing other LPIT0 regs) */ LPIT0->MIER = 0x00000001; /* TIE0=1: Timer Interrupt Enabled fot Chan 0 */ LPIT0->TVAL0 = 80000000; /* Chan 0 Timeout period: 80M clocks */ LPIT0->TCTRL0 = 0x00000001; /* T_EN=1: Timer channel is enabled */ /* CHAIN=0: channel chaining is disabled */ /* MODE=0: 32 periodic counter mode */ /* TSOT=0: Timer decrements immediately based on restart */ /* TSOI=0: Timer does not stop after timeout */ /* TROT=0 Timer will not reload on trigger */ /* TRG_SRC=0: External trigger soruce */ /* TRG_SEL=0: Timer chan 0 trigger source is selected*/ } void disable_WDOG (void){ WDOG->CNT=0xD928C520; /*Unlock watchdog*/ WDOG->TOVAL=0x0000FFFF; /*Maximum timeout value*/ WDOG->CS = 0x00002100; /*Disable watchdog*/ } int main(void) { disable_WDOG(); init_ports(); /* Configure ports */ init_SOSC_8MHz(); /* Initialize system oscilator for 8 MHz xtal */ init_SPLL_80MHz(); /* Initialize SPLL to 80 MHz with 8 MHz SOSC */ NormalRUNmode_80MHz(); /* Init clocks: 80 MHz SPLL & core, 40 MHz bus, 20 MHz flash */ init_IRQs(); /* Enable desired interrupts and priorities */ init_LPIT0(); /* Initialize PIT0 for 1 second timeout */ for (;;) { idle_counter++; } } void LPIT0_Ch0_IRQHandler (void) { lpit0_ch0_flag_counter++; /* Increment LPIT0 timeout counter */ PTB->PTOR |= 1<<4; /* Toggle output on port D0 (blue LED) */ LPIT0->MSR |= LPIT_MSR_TIF0_MASK; /* Clear LPIT0 timer flag 0 */ }
/* * hello_interrupts.c Copyright NXP 2016 * Description: Minimal interrupt example using LPIT0 chan 0 (vector 64) * 2016 Mar 04 S Mihalik - Initial Version * */ #include "derivative.h" /* include peripheral declarations S32K144 */ #include "clocks_and_modes.h" /* include peripheral declarations S32K144 */ int idle_counter = 0; /* main loop idle counter */ int lpit0_ch0_flag_counter = 0; /* LPIT0 chan 0 timeout counter */ void init_IRQs (void) { FSL_NVIC->ICPR[1] = 1 << (48 % 32); /* IRQ48-LPIT0 ch0: clr any pending IRQ*/ FSL_NVIC->ISER[1] = 1 << (48 % 32); /* IRQ48-LPIT0 ch0: enable IRQ */ FSL_NVIC->IP[48] = 0xA; /* IRQ48-LPIT0 ch0: priority 10 of 0-15*/ } void init_ports (void) { PCC-> PCCn[PCC_PORTB_INDEX] = PCC_PCCn_CGC_MASK; /* Enable clock for PORT B */ PTB->PDDR |= 1<<4; /* Port B4: Data Direction= output */ PORTB->PCR[4] = 0x00000100; /* Port B4: MUX = ALT1, GPIO (to blue LED on EVB) */ } void init_LPIT0 (void) { PCC->PCCn[PCC_LPIT0_INDEX] = PCC_PCCn_PCS(6); /* Clock Src = 6 (SPLL2_DIV2_CLK)*/ PCC->PCCn[PCC_LPIT0_INDEX] |= PCC_PCCn_CGC_MASK; /* Enable clk to LPIT0 regs */ LPIT0->MCR = 0x00000001; /* DBG_EN-0: Timer chans stop in Debug mode */ /* DOZE_EN=0: Timer chans are stopped in DOZE mode */ /* SW_RST=0: SW reset does not reset timer chans, regs */ /* M_CEN=1: enable module clk (allows writing other LPIT0 regs) */ LPIT0->MIER = 0x00000001; /* TIE0=1: Timer Interrupt Enabled fot Chan 0 */ LPIT0->TVAL0 = 80000000; /* Chan 0 Timeout period: 80M clocks */ LPIT0->TCTRL0 = 0x00000001; /* T_EN=1: Timer channel is enabled */ /* CHAIN=0: channel chaining is disabled */ /* MODE=0: 32 periodic counter mode */ /* TSOT=0: Timer decrements immediately based on restart */ /* TSOI=0: Timer does not stop after timeout */ /* TROT=0 Timer will not reload on trigger */ /* TRG_SRC=0: External trigger soruce */ /* TRG_SEL=0: Timer chan 0 trigger source is selected*/ } void disable_WDOG (void){ WDOG->CNT=0xD928C520; /*Unlock watchdog*/ WDOG->TOVAL=0x0000FFFF; /*Maximum timeout value*/ WDOG->CS = 0x00002100; /*Disable watchdog*/ } int main(void) { disable_WDOG(); init_ports(); /* Configure ports */ init_SOSC_8MHz(); /* Initialize system oscilator for 8 MHz xtal */ init_SPLL_80MHz(); /* Initialize SPLL to 80 MHz with 8 MHz SOSC */ NormalRUNmode_80MHz(); /* Init clocks: 80 MHz SPLL & core, 40 MHz bus, 20 MHz flash */ init_IRQs(); /* Enable desired interrupts and priorities */ init_LPIT0(); /* Initialize PIT0 for 1 second timeout */ for (;;) { idle_counter++; } } void LPIT0_Ch0_IRQHandler (void) { lpit0_ch0_flag_counter++; /* Increment LPIT0 timeout counter */ PTB->PTOR |= 1<<4; /* Toggle output on port D0 (blue LED) */ LPIT0->MSR |= LPIT_MSR_TIF0_MASK; /* Clear LPIT0 timer flag 0 */ }
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