lnak给出的思路变化较大，但结果还不行。
http://focus.ti.com/lit/ds/symlink/cd74hc4017.pdf
CD54HC4017, CD74HC4017
High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs
Description
The ’HC4017 is a high speed silicon gate CMOS 5-stage Johnson counter with 10 decoded outputs. Each of the decoded outputs is normally low and sequentially goes high on the low to high transition clock period of the 10 clock period cycle. The CARRY (TC) output transitions low to high after OUTPUT 10 goes from high to low, and can be used in conjunction with the CLOCK ENABLE (CE) to cascade several stages. The CLOCK ENABLE input disables counting when in the high state. A RESET (MR) input is also provided which when taken high sets all the decoded outputs, except “0”, low.
The device can drive up to 10 low power Schottky equivalent loads. |
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