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Stellaris M3 问答汇总 Ver 1.0

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TI_MCU|  楼主 | 2011-6-20 14:16 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式
本帖最后由 TI_MCU 于 2011-6-20 14:49 编辑

Clocks, Timers and PWMs
  • Are the clock sources for the two Watchdog modules on the Tempest-class devices different?
    The clock sources for the two Watchdog modules
    are different.
    Watchdog module 0 uses the system clock and Watchdog module 1 uses the precision internal oscillator (PIOSC).
  • What is the clock source for system clock?
    The system clock is configurable. A typical configuration is an external crystal input to the PLL. Other sources include the precision internal oscillator (PIOSC), the Hibernation module clock source, and the 30-kHz internal oscillator.
    Different devices have different options – refer to the “System Control” chapter of the data sheet for options for a specific device.
  • How many clock cycles are required to wake up from each of the sleep modes?
    Sleep mode requires 12 cycles to wake (ISR entry time). Deep-sleep mode automatically shuts down the PLL if it is enabled and re-enables it on wake so PLL lock time must be included on wake - about 10ms.
  • Does the RTC still operate in Sleep mode?
    What about Deep-sleep mode?
    Stellaris devices have clock gating, so each peripheral can be configured to sleep or stay awake during Sleep and Deep-sleep modes.
    So the RTC can be programmed to stop or to keep running.
  • Upon exit from hibernation, is there a POR?
    Yes.
    The Hibernate module can use the HIB signal to turn off the external 3.3 V regulator, and therefore the rest of the microcontroller is completely powered down.
  • Is the PWM synchronized with the ADC?
    The PWM can trigger the ADC.
  • How is the ADC triggered by the PWM timer units?
    The PWM generator has six configurable counter events (load, zero, compare A up, compare A down, compare B up, and compare B down) that can be used to generate an ADC trigger. Any of these events or a set of these events can be selected as a source for an ADC trigger.
  • How many PWM outputs are available?
    Each PWM module has 2 outputs.
    Stellaris devices have up to 4 modules
    .
  • What is the system clock speed on the Tempest devices?
    The maximum clock speed is 100 MHz.
  • Ethernet and 1588 PTP Support
    • How is 1588 support implemented in the Ethernet controller?
      1588 uses a timer to timestamp the incoming Ethernet packets.
    ·
    When you receive an ethernet device is the MAC address predefined from the beginning. If yes, what is the default MAC address ? If no, how can you program the devices using LM Flash Programmer and the ROM_ethernet_bootloader(When using rev C)?The devices on the Stellaris evaluation boards, development boards, and reference design kits come pre-programmed with a MAC address since it is an actual end product. Production devices (and sample devices) do not have MAC addresses pre-programmed. It is up the manufacturer of the final product to provide this MAC address for their specific company (vendor) and product.
    You can obtain your own unique block of MAC addresses through IEEE.


    An OUI provides you 24 bits of play room, and costs $1,650. See http://standards.ieee.org/regauth/oui/forms/


    An IAB provides you 12 bits of play room, and costs only $550. See http://standards.ieee.org/regauth/oui/pilot-ind.html


    There is a good FAQ here http://standards.ieee.org/faqs/OUI.html


    The Stellaris devices have 2 (or 4) non-volatile registers (USER_REGn) which are programmed during board test with a unique MAC address. In our example applications for Ethernet, this address is pulled from these registers during initilization, and written to the proper MAC registers. This is the way we recommend our customers store a unique MAC address since it is easy to access and not stored in the main flash array. The customer could however store a MAC address in non-volatile memory in any way they choose.

    You can program the MAC addresses to the USER_REGn registers with LMFlashProgrammer (see "Other Utilities" tab). LMFlashProgrammer allows you to program the non-volatile user's registers with the GUI or through the command line interface. LMFlashProgrammer could be scripted with the command line to program this on the assembly line using one of our eval boards as the USB/JTAG interface.

    You cannot program the USER_REGn registers using Ethernet Bootloader in ROM. The Ethernet bootloader in ROM will look at the USER_REG0 and USER_REG1 registers to see if they are programmed. If so, it will interpret the data as a MAC address and use that. If they are not programmed, it will use a hard coded MAC address of 00-1a-b6-00-64-00 (from the Luminary Micro (TI) allocation). The MAC address is NOT unique and is common to all devices and simply meant to be used during initial programming of a blank production device. This MAC

    • Can the 1588 clock be made available on an external pin?
      The 1588 clock is not available externally.
    • Is every packet time stamped in 1588?
      Yes.
    • What third-party software stacks are available for Ethernet 1588 and CAN (DeviceNet)?
      Go to http://www.luminarymicro.com/products/3rd_party_products.html for details on third party software solutions.
    • Is the timer for 1588 a part of the Ethernet MAC?
      The 1588 function requires the dedicated use of General-Purpose Timer 3.
    • Do competitive devices have 1588?
      Freescale has 1588 support on PQII Pro devices. ST has 1588 on the STM32.
    • How large are the Ethernet and USB stacks? Can they be built with the trial licenses for the various tools?
      The size depends on the stack... for ENET, uIP is small (a few kB), and lwIP is large (around 30 kB).
      For USB, we provide our own "micro stack" called USBLib that is relatively small and should fit into the evaluation limits. Whether they can be built with the trial licenses depends on what else you put in the application (such as images and text).
    • Is it possible to use the Ethernet MAC with an external PHY?
      No.
      The MII interface is not pinned out.
    Other Peripherals
    • Does the term “SPI” refer to the SSI module?
      Yes.
      SPI is one of the modes supported by the SSI module.
    • Does the SSI support TDM (multi-slot frames)?
      TDM is not supported.
    • Does the µDMA have an external trigger capability?
      No it doesn’t. However, a GPIO signal can be used as an input to generate an interrupt and then trigger a µDMA transfer in the interrupt handler.
    • What is Bosch CAN?
      Our CAN module is licensed from Bosch.
      It is a standard CAN 2.0a/b implementation. All processors that have CAN that complies with the Bosch CAN specification must have a license from Bosch to implement the data controller.
    • Do we have an NMEA2000 stack available?
      No.
    • Are there plans to go beyond 10 bits on the ADC?
      Higher resolution 12-bit ADC has been planned for the Firestorm platform in 2010.
    • Does the internal LDO generate 3.3 V?
      The internal LDO generates 2.5 V on Sandstorm-, Fury-, and DustDevil-class devices and 1.2 V on Tempest-class devices.
    • What maximum RPM has been achieved by the sensorless BLDC?
      The maximum speed for the BLDC is dependent on the type of the BLDC motor (number of pole pairs, etc.)
      We have seen ~40K RPM.


    EPIMaximum EPI frequency with external SRAM
    The maximum that the EPI can fetch data is (16 bits x 50MHz) / 6 cycles per access.  That gives you 133 Mbit/sec. That's an awful lot of data to be pumping in or out of the part, and it needs to come from somewhere or be stored somewhere in the MCU.  What would be generating that amount of data inside the MCU or where would the MCU be putting that much data if it were coming in?  None of the peripherals are capable of such speeds, and generating that amount of data with the CPU wouldn't allow the EPI to run at it's maximum rate.

    StellarisWare Software
    • Is there support from VECTOR for drivers?
      No.
    • Is a comparison of compiler performance available?
      No.
      We have not benchmarked the different compilers.
    • Are there any free Gcc-based compilers for Windows for Stellaris devices?
      Code Sourcery provides a free "lite" version that is the compiler by itself.
    • Do all of the compiler toolchains come with register definition header files for all of y**ices?
      Some do, but our StellarisWare software (and the corresponding DriverLib component) have drivers and headers for all of the devices. Some tools have viewers to show specific registers.
    • Did Luminary develop the systems software?
      We do all of the software ourselves, minus most of the stacks.
    • Is the Stellarisware software set up to build with any of the compiler toolchains with no code changes?
      Yes, there are project files for Keil, Code Red, IAR and Code Sourcery.
    • Is one toolchain better than the others as far as code optimization and code density are concerned?
      Keil and IAR typically have better code optimization and code density.
      Both CodeSourcery and Code Red use the Gcc compiler.
    • Are all the software stacks and libraries available for free with the evaluation boards?
      Yes, there is a firmware development package (FDP) for each board.
      The FDP includes then entire driver library, all of the board examples, and some open source stacks and software.
      This software can also be downloaded from the web for free at http://www.luminarymicro.com/products/software_updates.html.
    • Do Stellaris devices have uC Linux support?
      We do not currently have uC Linux support, but it is possible with the new Tempest-class devices.
    • Do any of the Stellaris code examples break the address limit?
      A few of the examples that use Ethernet stacks break the limit.
      But examples that use uIP are smaller than 32 kB.
    • How large are the Ethernet and USB stacks? Can they be built with the trial licenses for the various tools?
      The size depends on the stack... for ENET, uIP is small (a few kB), and lwIP is large (around 30 kB).
      For USB, we provide our own "micro stack" called USBLib that is relatively small and should fit into the evaluation limits. Whether they can be built with the trial licenses depends on what else you put in the application (such as images and text).
    • Is the Stellaris software standard available?
      It is an internal standard.
    • Are the peripheral libraries and USB/Ethernet APIs fairly stable?
      Yes, they are all very stable.
      We use StellarisWare for internal validation and emulation, so all of the software gets debugged before being released.
    • Are there any issues with upgrading to new software versions?
      We typically provide a path for people using old versions of the source.
      A good example is deprecated functions.
      We usually macro those to point to the newer APIs so that we don't break existing software.
      If you keep up with the release notes, you should be fine.
    • Are software releases locked to specific compiler revisions?
      StellarisWare is not locked to specific compilers - it works with them all (all the ones we listed on the first page of this section).
    • Is there a consistent software update release schedule on a reliable periodic basis?
      StellarisWare is updated monthly, typically the first week of every month.
    • What is IEC60730?
      It is a software-based built-in self-test that has been written to meet IEC60730 Class B standards.
    • Is source code provided for IEC60730 libraries?
      Yes. A software download accompanies the application note.
    • Do Stellaris devices have hardware BIST?
      No.
    • How long does it take to program 16 kB of code in Flash memory?
      It depends on the programmer, some are faster than others.
      Using the Stellaris on-board FTDI-based interface, it takes less than 10 seconds to program and verify 16 kB.
    • Which RTOS is the most popular?
      We hear the most about FreeRTOS.
    • With Code Red, can I just use the EVM as the JTAG debugger for my system?

      You cannot use the Code Red locked evaluation board to debug your custom board without a full license.
    • Does the StellarisWare software include field-oriented control software for ACIM and PMSM?
      Does this include sensorless control?
      We do not offer FOC software.
      We do have sensorless control for the BLDC RDK.
    GPIO Questions
    • Are all Stellaris devices 5-V tolerant?
      Yes, all Stellaris are 5-V tolerant.
    • Do the GPIO signals have (programmable) input glitch filters?
      When a digital input is enabled, a Schmitt trigger is turned on for that pin.
    • Do the GPIO signals have independently programmable drive strength?
      Yes, each GPIO pin is independently configurable for all functions, including drive strength. Note that the device can be stressed if it is sourcing too much current, so use of the 8-mA drive setting should be limited.
      See the “Recommended DC Operating Conditions” section in the Electrical Characteristics chapter of the data sheet.
    Debugging and Eval Kits
    • What would be a good introductory kit for an FAE?
      The EK-LM3S6965 kit is a very good starter kit.
    • Is IEEE 1149.1 boundary scan on the Stellaris devices?
      Yes, JTAG boundary scan is available.
    • Is SWD/SWT an ARM technology?
      Serial Wire Debug (SWD) and Serial Wire Trace (SWT) are unique to ARM.
      This debug module was developed for the Cortex architecture. All of the major tool vendors support at least the basic SWT functionality so you can do application profiling and ISR monitoring.
    • How does Stellaris support digital motor control tuning via JTAG?
      Trace information is not available while using JTAG, so the best way to debug motor control apps is to use Serial Wire Debug (SWD) and Serial Wire Trace (SWT) debug module. Some ARM devices have the ETM (Embedded Trace Module), but we don't implement the ETM on **ices.
    • With SWD, can you read from and write to internal RAM without disturbing the CPU or PWM modules?
      Yes, you can gather data from the device while it is running without stealing cycles from the CPU as well as access the internal RAM. With SWD, you can do everything you can do with JTAG, and more (such as SWT).
      In addition, SWD requires fewer pins.
    • What are the most popular tools?
      Based on the sales numbers of our kits, the popularity from most to least is Keil, Code Red, IAR and Code Sourcery.
    • Do the peripherals have software drivers and sample code available?

      Our StellarisWare software provides an extensive peripheral library and many examples for each of our kits.
    • Does the AC Induction Motor Control Module (ACIM) kit offer Volts/Hz control?
      You can specify the V/f curve for the ACIM kit.
    • Does the Brushless DC motor (BLDC) kit offer trapezoidal control?
      The BLDC is trapezoidal and sinusoidal, but it is only trapezoidal if you are using sensorless control.
    • Can you program Flash memory with a Standard SVF programmer (like a Xilinx pod)?
      No, you can’t.
    Other
    • Are Tempest-class devices sampling?
      Samples are not currently available...only evaluation kits, development kits, and reference design kits.
      Work through sales for details on sample silicon availability.
    • What is the sales and marketing contact?
      For contact information, see http://www.luminarymicro.com/home/contact_us.html.
    please what is the sequence in the boot rom about  peripherals , I mean  is  UART first , etc ?
    Please find here below an extract of Tempest specifications well explaining the different ROM boot call possibilities (including boot pins):
    "At any reset that resets the core, the user has the opportunity to direct the core to execute the ROM Boot Loader or the application in Flash memory by using any GPIO signal in Ports A-H as configuredin the Boot Configuration (BOOTCFG) register. If the ROM boot loader is not selected, code in the ROM checks address 0x000.0004 to see if the Flash memory has a valid reset vector. If the data at address 0x0000.0004 is 0xFFFF.FFFF, then it is assumed that the Flash memory has not yet been programmed, and the core executes the ROM Boot Loader"
    Please check BOOTCFG definition which explains how to use the "boot pin mode" configuration
    About the peripheral listening sequence handled by the boot rom I assume from the different docs and some Stellarisware codes that the bootloader listen serial interfaces (SSI/UART) and broadcast regularly BOOTP request  for Ethernet boot based on a SysTick period. When detecting a message from the host on one of those interfaces the bootloader switch to one peripheral bootloader process for firmware update
    Regards,

    Hibernate module
    • Hibernate module doesn’t work when VDD is off?
      you should control VDD power off through /HIB pin and power on though Wake pin, otherwise it doesn’t work, and the cystal doesn’t works.

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沙发
kekeke| | 2011-6-20 14:22 | 只看该作者
楼主 您最好在发个中文的 这样可以更好的参照了 :)

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板凳
kakio| | 2011-6-21 10:02 | 只看该作者
Do Stellaris devices have uC Linux support?

这个问题 我很感兴趣 ,

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地板
小毛毛虫| | 2011-6-22 11:24 | 只看该作者
强烈建议来个中文版

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5
yanghao9123| | 2011-6-23 14:10 | 只看该作者
中文版没有吗

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6
TI_MCU|  楼主 | 2011-6-23 15:06 | 只看该作者
目前没有中文版

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7
tikelu| | 2011-6-25 09:55 | 只看该作者
好可惜呀

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8
tikelu| | 2011-6-25 09:55 | 只看该作者
英文不好的呃要错过了

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9
永远的不知| | 2011-6-27 13:44 | 只看该作者
支持,等有时间我整理个中文的。

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10
anqier1| | 2011-7-2 10:04 | 只看该作者
期待中文的呀

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11
anqier1| | 2011-7-2 10:04 | 只看该作者
:handshake

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12
aaa2742| | 2011-7-4 10:34 | 只看该作者
:dizzy:

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pananmao3760675| | 2011-7-20 21:19 | 只看该作者
:(

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dengdc| | 2011-7-21 10:00 | 只看该作者
:Q英文的

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15
reposemind| | 2011-7-31 11:40 | 只看该作者
有用吗?

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16
logic21| | 2011-8-14 13:50 | 只看该作者
:victory:

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17
ShaoKn| | 2011-8-16 16:06 | 只看该作者
看不懂啊

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18
xifengsong| | 2011-8-16 21:16 | 只看该作者
看不懂

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