void main(void)
{
unsigned char counter;
unsigned char i;
/*High speed internal clock prescaler: 1*/
CLK_CKDIVR = 0x00;
_asm("sim");
/* Time Base configuration */
TIM1_PSCRH = 0x00; /* Configuration prescaler (Fck_cnt=Fck_psc/PSCR+1)*/
TIM1_PSCRL = 0x00; /* 00: Fck_cnt=Fck_psc */
TIM1_CR1 &= 0xEF; /* Counter mode up: Bit4(DIR): 0_UP,1_Down */
TIM1_ARRH = 0x00; /* PWM period */
#if Freq_100Hz
TIM1_ARRL = 0x72;
#else
TIM1_ARRL = 0xE3;
#endif
TIM1_RCR = 0x00; /* Counter repetition. */
/* Channel 1, 2 and 3 Configuration in PWM mode */
TIM1_CCMR1 |= 0x60; /* CC1 output mode: PWM mode 1. */
TIM1_CCMR2 |= 0x60; /* CC2 output mode: PWM mode 1. */
TIM1_CCMR3 |= 0x60; /* CC3 output mode: PWM mode 1. */
TIM1_CCER1 = 0x11; /* OC enabled. */
TIM1_CCER2 = 0x01;
TIM1_OISR |= 0x00; /* Idle state set */
TIM1_CCR1H = 0x00; /* CC1 Dutycycle */
TIM1_CCR1L = 0x39;
TIM1_CCR2H = 0x00; /* CC2 Dutycycle */
TIM1_CCR2L = 0x39;
TIM1_CCR3H = 0x00; /* CC3 Dutycycle */
TIM1_CCR3L = 0x39;
TIM1_IER = 0x01; /* Enable TIM1 update interrupt. */
TIM1_CR2 &=~0x01; /* disable Capture/Compare Preloaded Control. */
/* Automatic Output enable, Break, dead time and lock configuration*/
TIM1_BKR |= 0x48;
TIM1_DTR = 0x04; /* Dead time (1s/16MHz)*2*4 = 500ns */
TIM1_BKR |= 0x10; /* Break enable */
TIM1_BKR |= 0x20; /* Break polarity High */
TIM1_BKR |= 0x40; /* Automatic output enable */
TIM1_BKR |= 0x01; /* LockLevel_1 */
/* Main Output Enable */
TIM1_BKR |= 0x80; /* Output enable */
for(i=0; i<100; i++)
{
#if Freq_100Hz
pwm_duty[i]=(unsigned int)(55+(float)55*sin(2*3.1415926*(float)i*0.2/(float)20));
#else
pwm_duty[i]=(unsigned int)(110+(float)110*sin(2*3.1415926*(float)i*0.2/(float)20));
#endif
}
/* TIM1 counter enable */
TIM1_CR1 |= 0x01; /* Counter enable */
TIM1_EGR |= 0x01;
_asm("rim");
counter = 0;
while(1);
}
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