http://www.xilinx.com/support/answers/21632.htm 的内容如下：
How do I integrate per pin parasitic package data (in the .pkg file) provided in the IBIS archive into the IBIS file? How do I ensure that the latest IBIS model and package models are being adopted by IBISWriter for generating custom IBIS file?
Description
Xilinx provides IBIS models in two ways: generic family spanning models (direct from the Web), and through the IBISWriter program (available as part of the ISE design environment). IBISWriter is a utility which takes in a design implementation (.ncd) file, and outputs a custom IBIS file specific to the design.
Xilinx IBIS models contain two types of information:
1. I/O models describing the analog behavior of a pin depending on its I/O standard.
2. Package models describing either coarse package min, typ, max delay or (if available) detailed package parasitics models (see .pkg files) which in addition to per pin die pad to package ball delay also allow simulation of package crosstalk.
Solution
Solution: To account for package parasitics in your IBIS simulation:
1. When using the generic IBIS file:
a. The family base generic IBIS file can be found in Xilinx download center.
b. Per pin package parasitic data (if available) for the device family is included with the IBIS archive downloaded from the Xilinx download center. Each .pkg file represents a die/package combination within the family. Package naming convention: <PackageName_DieName_ibis>.pkg . If needed, please contact Xilinx technical support for assistance in acquiring the .pkg files for your target device and package.
i. If not available,
1. Use the coarse package parasitic provided in the family IBIS file (<family>.ibs).
2. Find the package of interest and uncomment the data R_pkg, C_pkg, and L_pkg identifiers.
3. Comment all other packages (comment character in IBIS is "|").
4. Simulate.
ii. If available, it's easiest to use the IBISwriter utility to avoid the manual editing required in step 1.
1. In the [pin] section, ensure every pin in the device/package is defined and assigned a net name and model.
2. Look for lines which start with [Define Package Model] line and [End Package Model] line in the .pkg file of interest.
3. Insert these two lines and everything in between immediately before the last line (line with IBIS keyword [End]) of the IBIS file.
4. Immediately above the first occurrence of [Model] line, type in: [Package Model] <pkg_model_name>. The <pkg_model_name> is available next to the [Define Package Model] line copied in the previous step.
5. Simulate.
2: When using the custom IBIS file (IBISWriter utility):
a. Design specific custom IBIS file is generated from IBISWriter (available as part of the ISE design environment), IBISWriter takes in a design implementation (.ncd) file, and IBISWriter outputs a custom/design specific IBIS file ready for simulation.
b. Per pin package parasitic data (if available) can be included in the custom IBIS file.
i. Command line: use -pin option or manually insert into the custom IBIS file as described in paragraph 1.b.ii above.
ii. Within ISE:
1. In the Processes window:
2. Expand the Implement design tree.
3. Expand the Place and Route tree.
4. Right-click Generate IBIS Model and select Properties.
5. Enable checkbox Generate Detailed Package Parasitics.
6. Double-click Generate IBIS Model to create to output file.
c. To ensure the custom/design specific IBIS file contains latest I/O model and package parasitic data:
i. For Virtex-4 and Virtex-5, run XilinxUpdate prior to the launch of IBISWirter. XilinxUpdate can synchronize the data file under ISE database with the latest IBIS data available in the Xilinx download center.
ii. For other devices, if the IBIS data in the Xilinx download center is updated after an ISE release, then I the IBISWriter utility cannot be used and you must configure the I/O model and package model manually with the steps below:
1. Download the latest available IBIS model from the download center.
2. Manual update of the I/O model:
-- For all models used in your design, look for the [Model] keyword, and copy everything until the next [Model] keyword.
-- Annotate the pin list to link each I/O pin using the new I/O model: Look for the [Pin] keyword. For all I/Os in your design if it is not already listed, then add a reference to it here; and if it is already listed, verify that it references the appropriate model. In this section, there should be one line per package pin. Syntax is: < pin number > < user-supplied pin name > < model name as defined by the [Model] keyword >.
3. Manual updates of the package model:
-- Process is described in paragraph 1.b above. |
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