M480增强型PWM的同步启动用法

/**************************************************************************//**

 * [url=home.php?mod=space&uid=288409]@file[/url]     main.c

 * [url=home.php?mod=space&uid=895143]@version[/url]  V3.00

 * [url=home.php?mod=space&uid=247401]@brief[/url]    Demonstrate how to use EPWM counter synchronous start function.

 *

 * [url=home.php?mod=space&uid=17282]@CopyRight[/url] (C) 2016 Nuvoton Technology Corp. All rights reserved.

 ******************************************************************************/

#include <stdio.h>

#include "NuMicro.h"



#define PLL_CLOCK       192000000







void SYS_Init(void)

{



    /* Set XT1_OUT(PF.2) and XT1_IN(PF.3) to input mode */

    PF->MODE &= ~(GPIO_MODE_MODE2_Msk | GPIO_MODE_MODE3_Msk);



    /* Enable HXT clock (external XTAL 12MHz) */

    CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);



    /* Wait for HXT clock ready */

    CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);



    /* Set core clock as PLL_CLOCK from PLL */

    CLK_SetCoreClock(PLL_CLOCK);



    /* Set PCLK0 = PCLK1 = HCLK/2 */

    CLK->PCLKDIV = (CLK_PCLKDIV_PCLK0DIV2 | CLK_PCLKDIV_PCLK1DIV2);



    /* Enable IP module clock */

    CLK_EnableModuleClock(EPWM0_MODULE);



    /* EPWM clock frequency is set double to PCLK: select EPWM module clock source as PLL */

    CLK_SetModuleClock(EPWM0_MODULE, CLK_CLKSEL2_EPWM0SEL_PLL, (uint32_t)NULL);



    /* Enable UART module clock */

    CLK_EnableModuleClock(UART0_MODULE);



    /* Select UART module clock source as HXT and UART module clock divider as 1 */

    CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UART0SEL_HXT, CLK_CLKDIV0_UART0(1));



    /* Update System Core Clock */

    SystemCoreClockUpdate();





    /* Set GPB multi-function pins for UART0 RXD and TXD */

    SYS->GPB_MFPH &= ~(SYS_GPB_MFPH_PB12MFP_Msk | SYS_GPB_MFPH_PB13MFP_Msk);

    SYS->GPB_MFPH |= (SYS_GPB_MFPH_PB12MFP_UART0_RXD | SYS_GPB_MFPH_PB13MFP_UART0_TXD);



    /* Set PA.0~5 multi-function pin for EPWM0 channel 0~5 */

    SYS->GPA_MFPL = (SYS->GPA_MFPL & ~SYS_GPA_MFPL_PA0MFP_Msk) | SYS_GPA_MFPL_PA0MFP_EPWM0_CH5;

    SYS->GPA_MFPL = (SYS->GPA_MFPL & ~SYS_GPA_MFPL_PA1MFP_Msk) | SYS_GPA_MFPL_PA1MFP_EPWM0_CH4;

    SYS->GPA_MFPL = (SYS->GPA_MFPL & ~SYS_GPA_MFPL_PA2MFP_Msk) | SYS_GPA_MFPL_PA2MFP_EPWM0_CH3;

    SYS->GPA_MFPL = (SYS->GPA_MFPL & ~SYS_GPA_MFPL_PA3MFP_Msk) | SYS_GPA_MFPL_PA3MFP_EPWM0_CH2;

    SYS->GPA_MFPL = (SYS->GPA_MFPL & ~SYS_GPA_MFPL_PA4MFP_Msk) | SYS_GPA_MFPL_PA4MFP_EPWM0_CH1;

    SYS->GPA_MFPL = (SYS->GPA_MFPL & ~SYS_GPA_MFPL_PA5MFP_Msk) | SYS_GPA_MFPL_PA5MFP_EPWM0_CH0;

}



void UART0_Init()

{

    /* Configure UART0 and set UART0 baud rate */

    UART_Open(UART0, 115200);

}



int32_t main(void)

{

    /* Init System, IP clock and multi-function I/O

       In the end of SYS_Init() will issue SYS_LockReg()

       to lock protected register. If user want to write

       protected register, please issue SYS_UnlockReg()

       to unlock protected register if necessary */



    /* Unlock protected registers */

    SYS_UnlockReg();



    /* Init System, IP clock and multi-function I/O */

    SYS_Init();



    /* Lock protected registers */

    SYS_LockReg();



    /* Init UART to 115200-8n1 for print message */

    UART0_Init();



    printf("\n\nCPU [url=home.php?mod=space&uid=72445]@[/url] %dHz(PLL@ %dHz)\n", SystemCoreClock, PllClock);

    printf("EPWM0 clock is from %s\n", (CLK->CLKSEL2 & CLK_CLKSEL2_EPWM0SEL_Msk) ? "CPU" : "PLL");

    printf("+------------------------------------------------------------------------+\n");

    printf("|                          EPWM Driver Sample Code                        |\n");

    printf("|                                                                        |\n");

    printf("+------------------------------------------------------------------------+\n");

    printf("  This sample code will output waveform with EPWM0  channel 0~5 at the same time.\n");

    printf("  I/O configuration:\n");

    printf("    waveform output pin: EPWM0_CH0(PA.5), EPWM0_CH1(PA.4), EPWM0_CH2(PA.3), EPWM0_CH3(PA.2), EPWM0_CH4(PA.1), EPWM0_CH5(PA.0)\n");





    /* EPWM0 channel 0~5 frequency and duty configuration are as follows */

    EPWM_ConfigOutputChannel(EPWM0, 0, 1000, 50);

    EPWM_ConfigOutputChannel(EPWM0, 1, 1000, 50);

    EPWM_ConfigOutputChannel(EPWM0, 2, 1000, 50);

    EPWM_ConfigOutputChannel(EPWM0, 3, 1000, 50);

    EPWM_ConfigOutputChannel(EPWM0, 4, 1000, 50);

    EPWM_ConfigOutputChannel(EPWM0, 5, 1000, 50);



    /* Enable counter synchronous start function for EPWM0 channel 0~5 */

    EPWM_ENABLE_TIMER_SYNC(EPWM0, 0x3F, EPWM_SSCTL_SSRC_EPWM0);



    /* Enable output of EPWM0 channel 0~5 */

    EPWM_EnableOutput(EPWM0, 0x3F);



    printf("Press any key to start.\n");

    getchar();



    /* Trigger EPWM counter synchronous start by EPWM0 */

    EPWM_TRIGGER_SYNC_START(EPWM0);



    printf("Done.");

    while(1);



}



/*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/