没有用库，因为感觉用库不爽。（不想比较，因为新事物毛病多是正常的）
贴出来，支持国产！
头文件定义：
#define PLL_P(x) ( (x) << (28) )
#define PLL_Q(x) ( (x) << (24) )
#define PLL_R(x) ( (x) << (20) )
#define PLL_N(x) ( (x) << (8) )
#define PLL_M(x) ( (x) << (0) )
#define PLL_XTAL_IN() ( (0) << (7) )
#define PLL_HRC_IN() ( (1) << (7) )
// CMU_OSCSTBSR
#define HRC_STABLE 1
#define XTAL_STABLE 0x08
#define MPLL_STABLE 0x20
#define UPLL_STABLE 0x40
#define FLASH_READ_WAIT(x) ((x) << (4))
#define RET_RAM_WRITE_WAIT(x) ((x) << (28))
#define RET_RAM_READ_WAIT(x) ((x) << (24))
#define RAM3_WRITE_WAIT(x) ((x) << (12))
#define RAM3_READ_WAIT(x) ((x) << (8))
#define RAM12_WRITE_WAIT(x) ((x) << (4))
#define RAM12_READ_WAIT(x) ((x) << (0))
#define HCLK_DIV(x) ((x) << (24))
#define EXCLK_DIV(x) ((x) << (20)) /* SDIO, CAN */
#define PCLK4_DIV(x) ((x) << (16)) /* ADC controller */
#define PCLK3_DIV(x) ((x) << (12)) /* RTC, I2C, CMP, WDT max 50MHz */
#define PCLK2_DIV(x) ((x) << (8)) /* ADC convert 60MHz */
#define PCLK1_DIV(x) ((x) << (4)) /* UART, SPI,TA,T4,T6 Control, I2S, 100MHz */
#define PCLK0_DIV(x) ((x) << (0)) /* T6, 200MHz */
#define USBCLK_SYS_DIV2 0x20
#define USBCLK_SYS_DIV3 0x30
#define USBCLK_SYS_DIV4 0x40
#define USBCLK_MPLL_P 0x80
#define USBCLK_MPLL_Q 0x90
#define USBCLK_MPLL_R 0xA0
#define USBCLK_UPLL_P 0xB0
#define USBCLK_UPLL_Q 0xC0
#define USBCLK_UPLL_R 0xD0
#define PERCLK_SCFGR 0
#define PERCLK_MPLL_P 0x0008
#define PERCLK_MPLL_Q 0x0009
#define PERCLK_MPLL_R 0x000A
#define PERCLK_UPLL_P 0x000B
#define PERCLK_UPLL_Q 0x000C
#define PERCLK_UPLL_R 0x000D
#define GPIO_UNLOCK() ( CM_GPIO->PWPR = 0xA501 )
#define GPIO_LOCK() ( CM_GPIO->PWPR = 0xA500 )
#define PWR_UNLOCK() ( CM_PWC->FPRC = 0xA50B )
#define PWR_LOCK() ( CM_PWC->FPRC = 0xA500 )
#define SRAM_UNLOCK() ( CM_SRAMC->WTCR = 0x3B01 )
#define SRAM_LOCK() ( CM_SRAMC->WTCR = 0x3B00 )
#define SRAM_UNLOCK() ( CM_SRAMC->WTCR = 0x3B01 )
#define SRAM_LOCK() ( CM_SRAMC->WTCR = 0x3B00 )
实现部分：
void ClkInit(void)
{
uint16_t tmp;
// PC14, PC15, PH0, PH1 as the xtal pin
GPIO_UNLOCK();
CM_GPIO->PCRC14 |= 0x8000;
CM_GPIO->PCRC15 |= 0x8000;
CM_GPIO->PCRH0 |= 0x8000;
CM_GPIO->PCRH1 |= 0x8000;
GPIO_LOCK();
/**** switch to XTAL ( 10MHz ) *************************/
PWR_UNLOCK();
CM_CMU->XTALCFGR = 0xA0; // XTAL, drive small
CM_CMU->XTALSTBCR = 8; // stable time is 8163 circle
CM_CMU->XTALCR = 0; // start XTAL
while (!( CM_CMU->OSCSTBSR & XTAL_STABLE ))
{}
CM_CMU->XTAL32CFGR = 0; // MID drive
CM_CMU->XTAL32CR = 0; // start
PWR_LOCK();
/**** M-VCO = 400MHz, U-VCO = 240MHz ********************/
PWR_UNLOCK();
CM_CMU->PLLCFGR = PLL_P(1) /*200MHz*/
| PLL_Q(3) /* 100MHz*/
| PLL_R(7) /* 50MHz*/
| PLL_N(19) /* 10MHz x 20 */
| PLL_XTAL_IN()
| PLL_M(0);
CM_CMU->UPLLCFGR = PLL_P(4) /* 48MHz*/
| PLL_Q(3) /* 60MHz*/
| PLL_R(1) /* 120MHz*/
| PLL_N(47) /* 5MHz x 48 */
| PLL_XTAL_IN()
| PLL_M(1); /* frequency division = 2 , input frequency = 5MHz */
CM_CMU->PLLCR = 0;
CM_CMU->UPLLCR = 0;
while (!( CM_CMU->OSCSTBSR & MPLL_STABLE )){}
while (!( CM_CMU->OSCSTBSR & UPLL_STABLE )){}
PWR_LOCK();
/******************* FLASH and SRAM insert wait circle ************/
CM_EFM->FAPRT = 0x0123;
CM_EFM->FAPRT = 0x3210; // Unlock flash
CM_EFM->FRMC |= FLASH_READ_WAIT(5); // data sheet V1.6 page 179
CM_EFM->FAPRT = 0x4567; // lock
SRAM_UNLOCK();
CM_SRAMC->WTCR = RET_RAM_WRITE_WAIT(1)
| RET_RAM_READ_WAIT(1)
| RAM3_WRITE_WAIT(1)
| RAM3_READ_WAIT(1)
| RAM12_WRITE_WAIT(1)
| RAM12_READ_WAIT(1);
SRAM_LOCK();
/************ system clock select **********
sys clock = 200MHz
SDUI clock = 100MHz
ADC control = 100MHz
PCK3 = 50MHz
PCK2 =50MHz ,ADC converter
PCK1 = 100MHz, uart, TA,T4,T6
*/
tmp = CM_CMU->OSCSTBSR;
if (( tmp & XTAL_STABLE ) && ( tmp & MPLL_STABLE ))
{
PWR_UNLOCK();
CM_CMU->CKSWR = 5; // system clock is MPLL-P, 200MHz
CM_CMU->SCFGR = HCLK_DIV(0) | EXCLK_DIV(1) | PCLK4_DIV(1) | PCLK3_DIV(2) |PCLK2_DIV(2) | PCLK1_DIV(1) | PCLK0_DIV(1);
CM_CMU->USBCKCFGR = USBCLK_UPLL_P;
CM_CMU->PERICKSEL = PERCLK_SCFGR;
CM_CMU->I2SCKSEL = PERCLK_SCFGR;
PWR_LOCK();
}
}
初步运行验证，正常，
|
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