下面是英文例程中对这段程序的说明： On TMX samples, to get the best performance of on chip RAM blocks M0/M1/L0/L1/H0 internal control registers bit have to be enabled. The bits are in Device emulation registers.
9. M0RAMDFT, M1RAMDFT, L0RAMDFT, L1RAMDFT and H0RAMDFT were removed: On F2810/12 prior to Rev C silicon initialization of these registers was required. This is no longer required as of Rev C silicon and the code that initializes them should be removed.
Example: struct "DEV_EMU_REGS" has no field "M0RAMDFT” Solution: Refer to Table 9 for register changes. Table 9 indicates that this register was removed and no longer needs to be initialized. Remove the code that initializes this register.
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