ddr2 的ODT是片内的匹配电阻使能，参考micron的datasheet odt上电的时候必须disable
ODT must be turned off prior to entering self refresh mode. During power-up and initialization
of the DDR2 SDRAM, ODT should be disabled until the EMR command is issued.
This will enable the ODT feature, at which point the ODT ball will determine the
RTT(EFF) value. Anytime the EMR enables the ODT function, ODT may not be driven
HIGH until eight clocks after the EMR has been enabled
Based off of the Power-Up Initialization Sequence defined by the DDR2 Spec, CKE and ODT should be maintained at a LOW state while applying power. To guarantee this occurs while the FPGA is being configured (before it can drive CKE and ODT "Low"), the pull-down to GND is required.
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