本帖最后由 GoldSunMonkey 于 2013-2-13 23:07 编辑
cyclone IV device handbook.pdf有比较详细的说明。 conf_done当device被配置文件后，为高电平 nconfig 程序正常运行为高电平 FPGA里面有一个internal oscillator for initialization，cyclone IV E里面是40M  CLKUSR
during POR(power up reset),the device resets,hold nstatus and conf_done low. while nconfig low,the device is in reset.you can begin reconfiguration by pulling nconfig pin low when nconfig goes high,the device exits reset and release the open-drain nstatus pin,which is then pulled high by an external 10k pull-up resister after nstatus is released,the device is ready to receive configuration data and the configuration stage starts.
cofiguration data is latched into cyclone iv device at each DCLK cycle
DATA0，DCLK , nCSO , ASDO连接EPCSX the nCSO pin function as FLASH_nCE pin in AP mode,the ASDO pin functions as the DATA[1] pin in AP and FPP modes. the nCEO is left unconnected or used as a user I/O pin when it does not feed nCE pin of another device.
JTAG下载口TDI , TDO , TMS , TCK 当使用JTAG，确保nCE是低电平
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