这是程序:
#define LED1 GpioDataRegs.GPADAT.bit.GPIO0
void main(void)
{
Uint16 j;
Uint32 k;
struct ECAN_REGS ECanbShadow;
InitSysCtrl(); //³õʼ»¯ÏµÍ³
InitECanGpio();//ÅäÖÃGPIOÒý½Å
DINT;
InitPieCtrl();//³õʼ»¯PIEÖжÏ
IER = 0x0000;//¹ØÖжÏ
IFR = 0x0000;
InitPieVectTable();//³õʼ»¯PIEÖжÏʸÁ¿±í
MessageReceivedCount = 0;
ErrorCount = 0;
PassCount = 0;
EALLOW;//ÅäÖÃeCANµÄRXºÍTX·Ö±ðΪeCANµÄ½ÓÊպͷ¢ËÍÒý½Å
ECanbShadow.CANTIOC.all = ECanbRegs.CANTIOC.all;
ECanbShadow.CANTIOC.bit.TXFUNC = 1;
ECanbRegs.CANTIOC.all = ECanbShadow.CANTIOC.all;
ECanbShadow.CANRIOC.all = ECanbRegs.CANRIOC.all;
ECanbShadow.CANRIOC.bit.RXFUNC = 1;
ECanbRegs.CANRIOC.all = ECanbShadow.CANRIOC.all;
EDIS;
// Configure the eCAN for self test mode
// Enable the enhanced features of the eCAN.
EALLOW;
ECanbShadow.CANMC.all = ECanbRegs.CANMC.all;
ECanbShadow.CANMC.bit.STM = 0; // Configure CAN for self-test mode
ECanbShadow.CANMC.bit.SCB = 1; // eCAN mode (reqd to access 32 mailboxes)
ECanbRegs.CANMC.all = ECanbShadow.CANMC.all;
EDIS;
EALLOW;
GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 0; // GPIO0 = GPIO0
GpioCtrlRegs.GPADIR.bit.GPIO0 = 1;
EDIS;
ECanaRegs.CANTRR.all= 0xFFFFFFFF;
ECanaRegs.CANTA.all= 0xFFFFFFFF;
// Disable all Mailboxes
ECanbRegs.CANME.all = 0;
EALLOW;
ECanbShadow.CANMC.all = ECanbRegs.CANMC.all;
ECanbShadow.CANMC.bit.CDR=1;
ECanbRegs.CANMC.all = ECanbShadow.CANMC.all;
EDIS;
//ÉèÖ÷¢ËÍÓÊÏäID À©Õ¹Ö¡
ECanbMboxes.MBOX0.MSGID.all = 0x00000000;
// Write to the MSGID field of RECEIVE mailboxes MBOX16
ECanbMboxes.MBOX16.MSGID.all = 0x9555AAA0;
/* // Configure Mailboxes 0-15 as Tx, 16-31 as Rx
// Since this write is to the entire register (instead of a bit
// field) a shadow register is not required.
ECanbRegs.CANMD.all = 0xFFFF0000;
*/
//ÓÊÏä0ΪTX
ECanbShadow.CANMD.all = ECanbRegs.CANMD.all;
ECanbShadow.CANMD.bit.MD0 =0;
ECanbShadow.CANMD.bit.MD16 =1;
ECanbRegs.CANMD.all = ECanbShadow.CANMD.all;
/* // Enable all Mailboxes
// Since this write is to the entire register (instead of a bit
// field) a shadow register is not required.
ECanbRegs.CANME.all = 0xFFFFFFFF;
*/
// Specify that 8 bits will be sent/received
ECanbMboxes.MBOX0.MSGCTRL.bit.DLC = 8;
// No remote frame is requested ûÓÐÔ¶·½Ó¦´ðÖ¡
// Since RTR bit is undefined upon reset,
// it must be initialized to the proper value
ECanbMboxes.MBOX0.MSGCTRL.bit.RTR = 0;
// Write to the mailbox RAM field of MBOX0
ECanbMboxes.MBOX0.MDL.all = 0x01010101;
ECanbMboxes.MBOX0.MDH.all = 0x01010101;
EALLOW;
ECanbShadow.CANMC.all = ECanbRegs.CANMC.all;
ECanbShadow.CANMC.bit.CDR = 0;
ECanbRegs.CANMC.all = ECanbShadow.CANMC.all;
EDIS;
//ÓÊÏäʹÄÜMailbox0 16
ECanbShadow.CANME.all = ECanbRegs.CANME.all;
ECanbShadow.CANME.bit.ME0 =1;
ECanbShadow.CANME.bit.ME16 =1;
ECanbRegs.CANME.all = ECanbShadow.CANME.all;
// Since this write is to the entire register (instead of a bit
// field) a shadow register is not required.
EALLOW;
ECanbRegs.CANMIM.all = 0xFFFFFFFF;//ʹÄÜÓÊÏäÖжÏ
// Request permission to change the configuration registers
ECanbShadow.CANMC.all = ECanbRegs.CANMC.all;
ECanbShadow.CANMC.bit.CCR = 1;
ECanbRegs.CANMC.all = ECanbShadow.CANMC.all;
EDIS;
// Wait until the CPU has been granted permission to change the
// configuration registers
// Wait for CCE bit to be set..
do
{
ECanbShadow.CANES.all = ECanbRegs.CANES.all;
} while(ECanbShadow.CANES.bit.CCE != 1 );
// Configure the eCAN timing
EALLOW;
ECanbShadow.CANBTC.all = ECanbRegs.CANBTC.all;
ECanbShadow.CANBTC.bit.BRPREG = 9; // (BRPREG + 1) = 10 feeds a 15 MHz CAN clock
ECanbShadow.CANBTC.bit.TSEG2REG = 5 ; // to the CAN module. (150 / 10 = 15) 5 7
ECanbShadow.CANBTC.bit.TSEG1REG = 7; // Bit time = 15 7 15
ECanbRegs.CANBTC.all = ECanbShadow.CANBTC.all;//1Mbps 600
ECanbShadow.CANMC.all = ECanbRegs.CANMC.all;
ECanbShadow.CANMC.bit.CCR = 0;
ECanbRegs.CANMC.all = ECanbShadow.CANMC.all;
EDIS;
// Wait until the CPU no longer has permission to change the
// configuration registers
do
{
ECanbShadow.CANES.all = ECanbRegs.CANES.all;
} while(ECanbShadow.CANES.bit.CCE != 0 );
// Begin transmitting
for(;;)
{
LED1 = 1;
for(j=0;j<1000;j++)
for(k=0;k<1000;k++);
LED1 = 0;
for(j=0;j<1000;j++)
for(k=0;k<1000;k++);
// DELAY_US(500);
ECanbRegs.CANTRS.all = 0x00000001; // Set TRS for all transmit mailboxes
// while(ECanbRegs.CANTA.all == 0x0000FFFF ) {} // Wait for all TAn bits to be set..
while(ECanbRegs.CANTA.all == 0){}
ECanbRegs.CANTA.all = 0x00000001; // Clear Mailbox0 TAn
MessageSendCount++;
// MessageReceivedCount++;
ECanbMboxes.MBOX0.MDL.all = 0x01010101;
ECanbMboxes.MBOX0.MDH.all = 0x01010101;
}
}
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