本帖最后由 xiaobai032 于 2019-5-24 20:48 编辑
需求：CAN通信采用扩展帧ID的方式，希望将ID第三，第四位为0x01的信息都接收，其他不收。比如ID号（16进制）为XXXX01XX的信息接收，其他信息不收。
问题：本人设置接收邮箱后发现邮箱可以接收其他ID号的信息（可能所有信息都可以接收）。信息发送正常。
代码如下：
void main(void)
{
// Step 1. Initialize System Control:
InitSysCtrl( ); // 系统时钟150MHz（10倍频，2分频）
MemCopy(&RamfuncsLoadStart, &RamfuncsLoadEnd, &RamfuncsRunStart);
InitFlash();
// Step 2. Initalize GPIO:
InitMyGpio(); // 初始化Gpio
InitECanaGpio(); // 初始化Ecan Gpio
// Step 3. Clear all interrupts and initialize PIE vector table:
DINT;
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
CalculateCRCTable();
InitECana();//TI例程
InitMailBox();
AdcConfigue(); // Adc初始化配置
SB_ID_configure();// 设备ID号识别
//found in DSP2833x_CpuTimers.c
//InitCpuTimers(); // For this example, only initialize the Cpu Timers
//ConfigCpuTimer(&CpuTimer0, 150, 1000);
//CpuTimer0Regs.TCR.all = 0x4001; // Use write-only instruction to set TSS bit = 0
if(SB_ID == 1)
{
InitScicGpio(); // 初始化SCI Gpio
scic_init(); // Sci初始化配置
EALLOW;
//PieVectTable.EPWM1_INT = &epwm1_timer_isr; // EPWM1中断入口
// PieVectTable.TINT0 = &cpu_timer0_isr;
PieVectTable.SCIRXINTC = &scicRxIsr; // SCIc接收中断入口
// PieVectTable.SCIRXINTB = &scibRxFifoIsr; // SCIb接收中断入口
EDIS;
// Step 4. Initialize all the Device Peripherals:
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0; // Stop all the TB clocks
EDIS;
//DELAY_US(2000000L); // 延时2s
EALLOW;
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;// Start all the timers synced
EDIS;
// Step 5. User specific code, enable interrupts
IER |= M_INT3;
PieCtrlRegs.PIEIER3.bit.INTx1 = 0; //epwm1
IER |= M_INT1;
PieCtrlRegs.PIEIER1.bit.INTx7 = 0; //cpu_timer
IER |= M_INT8;
PieCtrlRegs.PIEIER8.bit.INTx5 = 1; //SCICRX
EINT; // 开中断
ERTM; // 使能调试事件
}
else ;
for(;;)
{
//SB_control();//设备识别本地远程，并控制继电器
//AdcSample();//采样 计算
ZJD_SendMsg();
ZJD_ReceiveMsg();
//Error_detect();//故障检测并发送错误信息
//SB_Communication();//设备通讯
}
}
void InitECana(void) // Initialize eCAN-A module
{
/* Create a shadow register structure for the CAN control registers. This is
needed, since only 32-bit access is allowed to these registers. 16-bit access
to these registers could potentially corrupt the register contents or return
false data. This is especially true while writing to/reading from a bit
(or group of bits) among bits 16 - 31 */
struct ECAN_REGS ECanaShadow;
EALLOW; // EALLOW enables access to protected bits
/* Configure eCAN RX and TX pins for CAN operation using eCAN regs*/
ECanaShadow.CANTIOC.all = ECanaRegs.CANTIOC.all;
ECanaShadow.CANTIOC.bit.TXFUNC = 1;
ECanaRegs.CANTIOC.all = ECanaShadow.CANTIOC.all;
ECanaShadow.CANRIOC.all = ECanaRegs.CANRIOC.all;
ECanaShadow.CANRIOC.bit.RXFUNC = 1;
ECanaRegs.CANRIOC.all = ECanaShadow.CANRIOC.all;
/* Configure eCAN for HECC mode - (reqd to access mailboxes 16 thru 31) */
// HECC mode also enables time-stamping feature
ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
ECanaShadow.CANMC.bit.SCB = 1;//ecan
ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
/* Initialize all bits of 'Master Control Field' to zero */
// Some bits of MSGCTRL register come up in an unknown state. For proper operation,
// all bits (including reserved bits) of MSGCTRL must be initialized to zero
ECanaMboxes.MBOX0.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX1.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX2.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX3.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX4.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX5.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX6.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX7.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX8.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX9.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX10.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX11.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX12.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX13.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX14.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX15.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX16.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX17.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX18.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX19.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX20.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX21.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX22.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX23.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX24.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX25.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX26.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX27.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX28.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX29.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX30.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX31.MSGCTRL.all = 0x00000000;
// TAn, RMPn, GIFn bits are all zero upon reset and are cleared again
// as a matter of precaution.
ECanaRegs.CANTA.all = 0xFFFFFFFF; /* Clear all TAn bits */
ECanaRegs.CANRMP.all = 0xFFFFFFFF; /* Clear all RMPn bits */
ECanaRegs.CANGIF0.all = 0xFFFFFFFF; /* Clear all interrupt flag bits */
ECanaRegs.CANGIF1.all = 0xFFFFFFFF;
/* Configure bit timing parameters for eCANA*/
ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
ECanaShadow.CANMC.bit.CCR = 1 ; // Set CCR = 1
ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
ECanaShadow.CANES.all = ECanaRegs.CANES.all;
do
{
ECanaShadow.CANES.all = ECanaRegs.CANES.all;
} while(ECanaShadow.CANES.bit.CCE != 1 ); // Wait for CCE bit to be set..
ECanaShadow.CANBTC.all = 0;
#if (CPU_FRQ_150MHZ) // CPU_FRQ_150MHz is defined in DSP2833x_Examples.h
/* The following block for all 150 MHz SYSCLKOUT (75 MHz CAN clock) - default. Bit rate = 1 Mbps
See Note at End of File */
ECanaShadow.CANBTC.bit.BRPREG = 19;
ECanaShadow.CANBTC.bit.TSEG2REG = 2;
ECanaShadow.CANBTC.bit.TSEG1REG = 10;
#endif
#if (CPU_FRQ_100MHZ) // CPU_FRQ_100MHz is defined in DSP2833x_Examples.h
/* The following block is only for 100 MHz SYSCLKOUT (50 MHz CAN clock). Bit rate = 1 Mbps
See Note at End of File */
ECanaShadow.CANBTC.bit.BRPREG = 4;
ECanaShadow.CANBTC.bit.TSEG2REG = 1;
ECanaShadow.CANBTC.bit.TSEG1REG = 6;
#endif
ECanaShadow.CANBTC.bit.SAM = 1;
ECanaRegs.CANBTC.all = ECanaShadow.CANBTC.all;
ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
ECanaShadow.CANMC.bit.CCR = 0 ; // Set CCR = 0
ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
ECanaShadow.CANES.all = ECanaRegs.CANES.all;
do
{
ECanaShadow.CANES.all = ECanaRegs.CANES.all;
} while(ECanaShadow.CANES.bit.CCE != 0 ); // Wait for CCE bit to be cleared..
/* Disable all Mailboxes */
ECanaRegs.CANME.all = 0; // Required before writing the MSGIDs
EDIS;
}
void InitMailBox(void)
{
GpioDataRegs.GPACLEAR.bit.GPIO13 = 1; // 低电平 使能CAN
ECanaShadow.CANMD.all = ECanaRegs.CANMD.all;
ECanaShadow.CANMD.bit.MD3 = 0;//邮箱3为发送邮箱
ECanaShadow.CANMD.bit.MD5 = 1;//邮箱5为接收邮箱
ECanaRegs.CANMD.all = ECanaShadow.CANMD.all;
EALLOW;
ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
ECanaShadow.CANMC.bit.CCR = 1 ; // Set CCR = 1
ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
ECanaShadow.CANES.all = ECanaRegs.CANES.all;
ECanaShadow.CANES.all = ECanaRegs.CANES.all;
do
{
ECanaShadow.CANES.all = ECanaRegs.CANES.all;
} while(ECanaShadow.CANES.bit.CCE != 1 ); // Wait for CCE bit to be cleared..
switch(SB_ID)//设备ID
{
case 1://主节点 直流1
{
ECanaMboxes.MBOX5.MSGID.all = 0xC0000100;
ECanaLAMRegs.LAM5.all = 0xFFFF00FF;//目标地址为直流1均接收
}break;
case 2 ://从节点 直流2
{
ECanaMboxes.MBOX5.MSGID.all = 0xC0000200;
ECanaLAMRegs.LAM5.all = 0xFFFF00FF;//目标地址为直流2均接收
}break;
case 3://从节点 直流3
{
ECanaMboxes.MBOX5.MSGID.all = 0xC0000300;
ECanaLAMRegs.LAM5.all = 0xFFFF00FF;//目标地址为直流3均接收
}break;
default : ;
}
ECanaMboxes.MBOX3.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX5.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX3.MSGCTRL.bit.RTR = 0;
ECanaMboxes.MBOX5.MSGCTRL.bit.RTR = 0;
ECanaShadow.CANME.all = ECanaRegs.CANME.all;
ECanaShadow.CANME.bit.ME3 = 1;//邮箱3使能
ECanaShadow.CANME.bit.ME5 = 1;//邮箱5使能
ECanaRegs.CANME.all = ECanaShadow.CANME.all;
ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
ECanaShadow.CANMC.bit.CCR = 0 ; // Set CCR = 0
ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
ECanaShadow.CANES.all = ECanaRegs.CANES.all;
do
{
ECanaShadow.CANES.all = ECanaRegs.CANES.all;
} while(ECanaShadow.CANES.bit.CCE != 0 ); // Wait for CCE bit to be cleared..
EDIS;
}
void ZJD_ReceiveMsg(void)
{
ECanaShadow.CANRMP.all = ECanaRegs.CANRMP.all;
if(ECanaShadow.CANRMP.bit.RMP5 == 1)//邮箱5接收到数据
{
Uint16 temp_shebei = 0 ;
Uint16 temp_zhiling = 0 ;
Uint16 temp_xvhao = 0 ;
volatile struct MBOX *Mailbox = &ECanaMboxes.MBOX5 ;
ID = Mailbox->MSGID.all;
temp_shebei = ((ID & 0x00FF0000)>>16);//源设备
temp_zhiling = ((ID & 0x1F000000)>>24);//帧类型
temp_xvhao = (ID & 0x000000FF);//帧序号
。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。
ECanaShadow.CANRMP.bit.RMP5 = 1;
}
ECanaRegs.CANRMP.all = ECanaShadow.CANRMP.all;
} |
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