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1.1 About the ARM architecture<br /><br /> The ARM architecture has been designed to allow very small, yet high-performence <br /><br />implementations. The architectural simplicity of ARM processors leads to very small <br /><br />implementations allow devices with very low power consumption.<br /><br /> The ARM is a Reduced Instruction Set Computer(RISC), as it incorporates these typical <br /><br />RISC architecture features:<br /><br /> . a large uniform register file<br /> . a load/store architecture, where data-processing operations only operate on register <br /><br />contents, not directly on memory contents<br /> . simple addressing modes, with all load/store address being determined from regsiter <br /><br />contents and instruction fields only<br /> . uniform and fixed-length instruction field, to simplify instruction decode.<br /><br /> In addition,the ARM architecture gives you:<br /><br /> . control over both the Arithmetic Logic Unit (ALU) and shifter in every <br /><br />data-processing instruction to maximize the use of an ALU and a shifter<br /> . auto-increment and auto-decrement addressing modes to optimize program loops<br /> . Load and Store Multiple instructions to maximize data throughput.<br /> . conditional execution of all instructions to maximize execution throughput.<br /><br /> These enhancements to a basic RISC architecture allow ARM processors to achieve a good <br /><br />balance of high performance,low code size,low power consumption and low silicon area.<br /><br /><br />引自ARM官方的《ARM Architecture Reference Manual》<br /><br />本人确实不太精通，但比较相信“老祖宗”的话。<br />
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