/**************************************************************************//**
* [url=home.php?mod=space&uid=288409]@file[/url] main.c
* [url=home.php?mod=space&uid=895143]@version[/url] V1.00
* $Revision: 9 $
* $Date: 15/09/02 10:04a $
* [url=home.php?mod=space&uid=247401]@brief[/url] Capture the PWM1 Channel 0 waveform by PWM1 Channel 2.
* @note
* Copyright (C) 2014~2015 Nuvoton Technology Corp. All rights reserved.
*
******************************************************************************/
#include <stdio.h>
#include "M451Series.h"
/*---------------------------------------------------------------------------------------------------------*/
/* Macro, type and constant definitions */
/*---------------------------------------------------------------------------------------------------------*/
#define PLL_CLOCK 144000000
/*---------------------------------------------------------------------------------------------------------*/
/* Global variables */
/*---------------------------------------------------------------------------------------------------------*/
/**
* @brief PWM1 IRQ Handler
*
* @param None
*
* [url=home.php?mod=space&uid=266161]@return[/url] None
*
* [url=home.php?mod=space&uid=1543424]@Details[/url] ISR to handle PWM1 interrupt event
*/
void PWM1P1_IRQHandler(void)
{
if(PWM_GetCaptureIntFlag(PWM1, 2) > 1)
{
PWM_ClearCaptureIntFlag(PWM1, 2, PWM_CAPTURE_INT_FALLING_LATCH);
}
}
/*--------------------------------------------------------------------------------------*/
/* Capture function to calculate the input waveform information */
/* u32Count[4] : Keep the internal counter value when input signal rising / falling */
/* happens */
/* */
/* time A B C D */
/* ___ ___ ___ ___ ___ ___ ___ ___ */
/* ____| |_| |_| |_| |_| |_| |_| |_| |_____ */
/* index 0 1 2 3 */
/* */
/* The capture internal counter down count from 0x10000, and reload to 0x10000 after */
/* input signal falling happens (Time B/C/D) */
/*--------------------------------------------------------------------------------------*/
void CalPeriodTime(PWM_T *PWM, uint32_t u32Ch)
{
uint16_t u32Count[4];
uint32_t u32i;
uint16_t u16RisingTime, u16FallingTime, u16HighPeriod, u16LowPeriod, u16TotalPeriod;
/* Clear Capture Falling Indicator (Time A) */
PWM_ClearCaptureIntFlag(PWM, u32Ch, PWM_CAPTURE_INT_FALLING_LATCH);
/* Wait for Capture Falling Indicator */
while((PWM1->CAPIF & PWM_CAPIF_CFLIF2_Msk) == 0);
/* Clear Capture Falling Indicator (Time B)*/
PWM_ClearCaptureIntFlag(PWM, u32Ch, PWM_CAPTURE_INT_FALLING_LATCH);
u32i = 0;
while(u32i < 4)
{
/* Wait for Capture Falling Indicator */
while(PWM_GetCaptureIntFlag(PWM, u32Ch) < 2);
/* Clear Capture Falling and Rising Indicator */
PWM_ClearCaptureIntFlag(PWM, u32Ch, PWM_CAPTURE_INT_FALLING_LATCH | PWM_CAPTURE_INT_RISING_LATCH);
/* Get Capture Falling Latch Counter Data */
u32Count[u32i++] = PWM_GET_CAPTURE_FALLING_DATA(PWM, u32Ch);
/* Wait for Capture Rising Indicator */
while(PWM_GetCaptureIntFlag(PWM, u32Ch) < 2);
/* Clear Capture Rising Indicator */
PWM_ClearCaptureIntFlag(PWM, u32Ch, PWM_CAPTURE_INT_RISING_LATCH);
/* Get Capture Rising Latch Counter Data */
u32Count[u32i++] = PWM_GET_CAPTURE_RISING_DATA(PWM, u32Ch);
}
u16RisingTime = u32Count[1];
u16FallingTime = u32Count[0];
u16HighPeriod = u32Count[1] - u32Count[2];
u16LowPeriod = 0x10000 - u32Count[1];
u16TotalPeriod = 0x10000 - u32Count[2];
printf("\nPWM generate: \nHigh Period=17279 ~ 17281, Low Period=40319 ~ 40321, Total Period=57599 ~ 57601\n");
printf("\nCapture Result: Rising Time = %d, Falling Time = %d \nHigh Period = %d, Low Period = %d, Total Period = %d.\n\n",
u16RisingTime, u16FallingTime, u16HighPeriod, u16LowPeriod, u16TotalPeriod);
if((u16HighPeriod < 17279) || (u16HighPeriod > 17281) || (u16LowPeriod < 40319) || (u16LowPeriod > 40321) || (u16TotalPeriod < 57599) || (u16TotalPeriod > 57601))
printf("Capture Test Fail!!\n");
else
printf("Capture Test Pass!!\n");
}
void SYS_Init(void)
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init System Clock */
/*---------------------------------------------------------------------------------------------------------*/
/* Enable HIRC clock (Internal RC 22.1184MHz) */
CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
/* Waiting for HIRC clock ready */
CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
/* Select HCLK clock source as HIRC and and HCLK clock divider as 1 */
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
/* Enable HXT clock (external XTAL 12MHz) */
CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
/* Waiting for HXT clock ready */
CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
/* Set core clock as PLL_CLOCK from PLL */
CLK_SetCoreClock(PLL_CLOCK);
/* Waiting for PLL clock ready */
CLK_WaitClockReady(CLK_STATUS_PLLSTB_Msk);
/* Enable PWM1 module clock */
CLK_EnableModuleClock(PWM1_MODULE);
/*---------------------------------------------------------------------------------------------------------*/
/* PWM clock frequency configuration */
/*---------------------------------------------------------------------------------------------------------*/
/* Select HCLK clock source as PLL and and HCLK clock divider as 2 */
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_PLL, CLK_CLKDIV0_HCLK(2));
/* PWM clock frequency can be set equal or double to HCLK by choosing case 1 or case 2 */
/* case 1.PWM clock frequency is set equal to HCLK: select PWM module clock source as PCLK */
CLK_SetModuleClock(PWM1_MODULE, CLK_CLKSEL2_PWM1SEL_PCLK1, NULL);
/* case 2.PWM clock frequency is set double to HCLK: select PWM module clock source as PLL */
//CLK_SetModuleClock(PWM1_MODULE, CLK_CLKSEL2_PWM1SEL_PLL, NULL);
/*---------------------------------------------------------------------------------------------------------*/
/* Enable UART module clock */
CLK_EnableModuleClock(UART0_MODULE);
/* Select UART module clock source as HXT and UART module clock divider as 1 */
CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UARTSEL_HXT, CLK_CLKDIV0_UART(1));
/* Reset PWM1 module */
SYS_ResetModule(PWM1_RST);
/* Update System Core Clock */
SystemCoreClockUpdate();
/*---------------------------------------------------------------------------------------------------------*/
/* Init I/O Multi-function */
/*---------------------------------------------------------------------------------------------------------*/
/* Set PD multi-function pins for UART0 RXD and TXD */
SYS->GPD_MFPL &= ~(SYS_GPD_MFPL_PD0MFP_Msk | SYS_GPD_MFPL_PD1MFP_Msk);
SYS->GPD_MFPL |= (SYS_GPD_MFPL_PD0MFP_UART0_RXD | SYS_GPD_MFPL_PD1MFP_UART0_TXD);
/* Set PC multi-function pins for PWM1 Channel 0 and 2 */
SYS->GPC_MFPL = (SYS->GPC_MFPL & (~SYS_GPC_MFPL_PC6MFP_Msk));
SYS->GPC_MFPL |= SYS_GPC_MFPL_PC6MFP_PWM1_CH0;
SYS->GPC_MFPH = (SYS->GPC_MFPH & (~SYS_GPC_MFPH_PC11MFP_Msk));
SYS->GPC_MFPH |= SYS_GPC_MFPH_PC11MFP_PWM1_CH2;
}
void UART0_Init()
{
/*---------------------------------------------------------------------------------------------------------*/
/* Init UART */
/*---------------------------------------------------------------------------------------------------------*/
/* Reset UART module */
SYS_ResetModule(UART0_RST);
/* Configure UART0 and set UART0 baud rate */
UART_Open(UART0, 115200);
}
/*---------------------------------------------------------------------------------------------------------*/
/* Main Function */
/*---------------------------------------------------------------------------------------------------------*/
int32_t main(void)
{
/* Init System, IP clock and multi-function I/O
In the end of SYS_Init() will issue SYS_LockReg()
to lock protected register. If user want to write
protected register, please issue SYS_UnlockReg()
to unlock protected register if necessary */
/* Unlock protected registers */
SYS_UnlockReg();
/* Init System, IP clock and multi-function I/O */
SYS_Init();
/* Lock protected registers */
SYS_LockReg();
/* Init UART to 115200-8n1 for print message */
UART0_Init();
printf("\n\nCPU [url=home.php?mod=space&uid=72445]@[/url] %dHz(PLL@ %dHz)\n", SystemCoreClock, PllClock);
printf("PWM1 clock is from %s\n", (CLK->CLKSEL2 & CLK_CLKSEL2_PWM1SEL_Msk) ? "CPU" : "PLL");
printf("+------------------------------------------------------------------------+\n");
printf("| PWM Driver Sample Code |\n");
printf("| |\n");
printf("+------------------------------------------------------------------------+\n");
printf(" This sample code will use PWM1 channel 2 to capture\n the signal from PWM1 channel 0.\n");
printf(" I/O configuration:\n");
printf(" PWM1 channel 2(PC.11) <--> PWM1 channel 0(PC.6)\n\n");
printf("Use PWM1 Channel 2(PC.11) to capture the PWM1 Channel 0(PC.6) Waveform\n");
while(1)
{
printf("\n\nPress any key to start PWM Capture Test\n");
getchar();
/*--------------------------------------------------------------------------------------*/
/* Set the PWM1 Channel 0 as PWM output function. */
/*--------------------------------------------------------------------------------------*/
/* Assume PWM output frequency is 250Hz and duty ratio is 30%, user can calculate PWM settings by follows.
duty ratio = (CMR+1)/(CNR+1)
cycle time = CNR+1
High level = CMR+1
PWM clock source frequency = PLL = 72000000
(CNR+1) = PWM clock source frequency/prescaler/PWM output frequency
= 72000000/5/250 = 57600
(Note: CNR is 16 bits, so if calculated value is larger than 65536, user should increase prescale value.)
CNR = 57599
duty ratio = 30% ==> (CMR+1)/(CNR+1) = 30%
CMR = 17279
Prescale value is 4 : prescaler= 5
*/
/* set PWM1 channel 0 output configuration */
PWM_ConfigOutputChannel(PWM1, 0, 250, 30);
/* Enable PWM Output path for PWM1 channel 0 */
PWM_EnableOutput(PWM1, PWM_CH_0_MASK);
/* Enable Timer for PWM1 channel 0 */
PWM_Start(PWM1, PWM_CH_0_MASK);
/*--------------------------------------------------------------------------------------*/
/* Set the PWM1 channel 2 for capture function */
/*--------------------------------------------------------------------------------------*/
/* If input minimum frequency is 250Hz, user can calculate capture settings by follows.
Capture clock source frequency = PLL = 72000000 in the sample code.
(CNR+1) = Capture clock source frequency/prescaler/minimum input frequency
= 72000000/5/250 = 57600
(Note: CNR is 16 bits, so if calculated value is larger than 65536, user should increase prescale value.)
CNR = 0xFFFF
(Note: In capture mode, user should set CNR to 0xFFFF to increase capture frequency range.)
Capture unit time = 1/Capture clock source frequency/prescaler
69.4ns = 1/72000000/5
*/
/* set PWM1 channel 2 capture configuration */
PWM_ConfigCaptureChannel(PWM1, 2, 69, 0);
/* Enable capture falling edge interrupt for PWM1 channel 2 */
//PWM_EnableCaptureInt(PWM1, 2, PWM_CAPTURE_INT_FALLING_LATCH);
/* Enable PWM1 NVIC interrupt */
//NVIC_EnableIRQ(PWM1P1_IRQn);
/* Enable Timer for PWM1 channel 2 */
PWM_Start(PWM1, PWM_CH_2_MASK);
/* Enable Capture Function for PWM1 channel 2 */
PWM_EnableCapture(PWM1, PWM_CH_2_MASK);
/* Enable falling capture reload */
PWM1->CAPCTL |= PWM_CAPCTL_FCRLDEN2_Msk;
/* Wait until PWM1 channel 2 Timer start to count */
while((PWM1->CNT[2]) == 0);
/* Capture the Input Waveform Data */
CalPeriodTime(PWM1, 2);
/*---------------------------------------------------------------------------------------------------------*/
/* Stop PWM1 channel 0 (Recommended procedure method 1) */
/* Set PWM Timer loaded value(Period) as 0. When PWM internal counter(CNT) reaches to 0, disable PWM Timer */
/*---------------------------------------------------------------------------------------------------------*/
/* Set PWM1 channel 0 loaded value as 0 */
PWM_Stop(PWM1, PWM_CH_0_MASK);
/* Wait until PWM1 channel 0 Timer Stop */
while((PWM1->CNT[0] & PWM_CNT_CNT_Msk) != 0);
/* Disable Timer for PWM1 channel 0 */
PWM_ForceStop(PWM1, PWM_CH_0_MASK);
/* Disable PWM Output path for PWM1 channel 0 */
PWM_DisableOutput(PWM1, PWM_CH_0_MASK);
/*---------------------------------------------------------------------------------------------------------*/
/* Stop PWM1 channel 2 (Recommended procedure method 1) */
/* Set PWM Timer loaded value(Period) as 0. When PWM internal counter(CNT) reaches to 0, disable PWM Timer */
/*---------------------------------------------------------------------------------------------------------*/
/* Disable PWM1 NVIC */
//NVIC_DisableIRQ(PWM1P1_IRQn);
/* Set loaded value as 0 for PWM1 channel 2 */
PWM_Stop(PWM1, PWM_CH_2_MASK);
/* Wait until PWM1 channel 2 current counter reach to 0 */
while((PWM1->CNT[2] & PWM_CNT_CNT_Msk) != 0);
/* Disable Timer for PWM1 channel 2 */
PWM_ForceStop(PWM1, PWM_CH_2_MASK);
/* Disable Capture Function and Capture Input path for PWM1 channel 2*/
PWM_DisableCapture(PWM1, PWM_CH_2_MASK);
/* Clear Capture Interrupt flag for PWM1 channel 2 */
PWM_ClearCaptureIntFlag(PWM1, 2, PWM_CAPTURE_INT_FALLING_LATCH);
}
}
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