GD32F470IK CAN通信配置问题(过滤器)

只看该作者 · 2024-9-11 12:49

采用GD32F470IK,该芯片有两个CAN，CAN0,CAN1，问题：仅在CAN0被配置的情况下CAN1配置后才能接收到收据，否则CAN1仅能发出数据，
查阅了相关资料个人感觉是filter.number设置有关系，因为该芯片只有CAN0才能操作CAN_FCTL寄存器，但是这个操作都是官方在如下函数写死的，即使配置CAN1的时候应当也能操作这个寄存器啊，实际为什么不行呢？
void can_filter_init(can_filter_parameter_struct *can_filter_parameter_init)
{
uint32_t val = 0U;

val = ((uint32_t)1) << (can_filter_parameter_init->filter_number);
/* filter lock disable */
CAN_FCTL(CAN0) |= CAN_FCTL_FLD;
/* disable filter */
CAN_FW(CAN0) &= ~(uint32_t)val;

，，，，
}
我的CAN 配置如下：
void CAN0_Init(void)
{
can_parameter_struct can_parameter;
can_filter_parameter_struct can_filter;
/* initialize CAN structures */
can_struct_para_init(CAN_INIT_STRUCT, &can_parameter);
can_struct_para_init(CAN_FILTER_STRUCT, &can_filter);
/* initialize CAN register */
/* enable CAN clock */
rcu_periph_clock_enable(RCU_CAN0);
rcu_periph_clock_enable(RCU_GPIOB);

can_deinit(CAN0);

/* configure CAN0 RX */
gpio_output_options_set(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_8);
gpio_mode_set(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_8);
gpio_af_set(GPIOB, GPIO_AF_9, GPIO_PIN_8);

/* configure CAN0 TX */
gpio_output_options_set(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_9);
gpio_mode_set(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_9);
gpio_af_set(GPIOB, GPIO_AF_9, GPIO_PIN_9);

/* initialize CAN */
can_parameter.time_triggered = DISABLE;
can_parameter.auto_bus_off_recovery = ENABLE;
can_parameter.auto_wake_up = DISABLE;
can_parameter.auto_retrans = ENABLE;
can_parameter.rec_fifo_overwrite = DISABLE;
can_parameter.trans_fifo_order = DISABLE;
can_parameter.working_mode = CAN_NORMAL_MODE;
can_parameter.resync_jump_width = CAN_BT_SJW_1TQ;
can_parameter.time_segment_1 = CAN_BT_BS1_16TQ;
can_parameter.time_segment_2 = CAN_BT_BS2_3TQ;
/* baudrate 100kbps ，APB1:60000000，*/
can_parameter.prescaler = 30;
can_init(CAN0, &can_parameter);
/* initialize filter */
/* CAN0 filter number */
can_filter.filter_number = 0;

/* initialize filter */
can_filter.filter_mode = CAN_FILTERMODE_MASK;
can_filter.filter_bits = CAN_FILTERBITS_32BIT;
can_filter.filter_list_high = 0x0000;
can_filter.filter_list_low = 0x0000;
can_filter.filter_mask_high = 0x0000;
can_filter.filter_mask_low = 0x0000;
can_filter.filter_fifo_number = CAN_FIFO0;
can_filter.filter_enable = ENABLE;
can_filter_init(&can_filter);

can_interrupt_enable(CAN0, CAN_INTEN_RFNEIE0);
nvic_irq_enable(CAN0_RX0_IRQn, 0, 0);
}
void CAN1_Init(void)
{
can_parameter_struct can_parameter;
can_filter_parameter_struct can_filter;
/* initialize CAN structures */
can_struct_para_init(CAN_INIT_STRUCT, &can_parameter);
can_struct_para_init(CAN_FILTER_STRUCT, &can_filter);
/* initialize CAN register */
/* enable CAN clock */
rcu_periph_clock_enable(RCU_CAN1);
rcu_periph_clock_enable(RCU_GPIOB);

can_deinit(CAN1);

/* configure CAN1 GPIO */
gpio_output_options_set(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_5);
gpio_mode_set(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_5);
gpio_af_set(GPIOB, GPIO_AF_9, GPIO_PIN_5);

gpio_output_options_set(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_6);
gpio_mode_set(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_6);
gpio_af_set(GPIOB, GPIO_AF_9, GPIO_PIN_6);

/* initialize CAN */
can_parameter.time_triggered = DISABLE;
can_parameter.auto_bus_off_recovery = ENABLE;
can_parameter.auto_wake_up = DISABLE;
can_parameter.auto_retrans = ENABLE;
can_parameter.rec_fifo_overwrite = DISABLE;
can_parameter.trans_fifo_order = DISABLE;
can_parameter.working_mode = CAN_NORMAL_MODE;
can_parameter.resync_jump_width = CAN_BT_SJW_1TQ;
can_parameter.time_segment_1 = CAN_BT_BS1_16TQ;
can_parameter.time_segment_2 = CAN_BT_BS2_3TQ;
/* baudrate 100kbps ，APB1:60000000，*/
can_parameter.prescaler = 30;
can_init(CAN1, &can_parameter);
/* initialize filter */
/* CAN0 filter number */
can_filter.filter_number = 15;

/* initialize filter */
can_filter.filter_mode = CAN_FILTERMODE_MASK;
can_filter.filter_bits = CAN_FILTERBITS_32BIT;
can_filter.filter_list_high = 0x0000;
can_filter.filter_list_low = 0x0000;
can_filter.filter_mask_high = 0x0000;
can_filter.filter_mask_low = 0x0000;
can_filter.filter_fifo_number = CAN_FIFO0;
can_filter.filter_enable = ENABLE;
can_filter_init(&can_filter);

can_interrupt_enable(CAN1, CAN_INTEN_RFNEIE0);
nvic_irq_enable(CAN1_RX0_IRQn, 0, 0);
}