MSP430F5529 硬件IIC通信 SCL引脚输出为低电平？

只看该作者 · 2015-5-27 15:56

用MSP430F5529和adxl345硬件iic通信时，发现msp430iic的SCL引脚不能输出正确的时钟，后来以为代码的问题，所以用了官方的代码，但是还是输出为低电平。求解。

只看该作者 · 2015-5-27 15:58

官方代码
//******************************************************************************
//  MSP430F552x Demo - USCI_B0 I2C Master RX single bytes from MSP430 Slave
//
//  Description: This demo connects two MSP430's via the I2C bus. The master
//  reads from the slave. This is the MASTER CODE. The data from the slave
//  transmitter begins at 0 and increments with each transfer. The received
//  data is in R5 and is checked for validity. If the received data is
//  incorrect, the CPU is trapped and the P1.0 LED will stay on. The USCI_B0
//  RX interrupt is used to know when new data has been received.
//  ACLK = n/a, MCLK = SMCLK = BRCLK = default DCO = ~1.045MHz
//
// ***to be used with "MSP430F55xx_uscib0_i2c_05.c" ***
//
//                               /|\  /|\
//             MSP430F5529    10k  10k    MSP430F5529
//                slave       | |       master
//          ----------------- | | -----------------
//          -|XIN  P3.0/UCB0SDA|<-|----+->|P3.0/UCB0SDA  XIN|-
//          |                |  |    |                | 32kHz
//          -|XOUT          |  |    |          XOUT|-
//          |    P3.1/UCB0SCL|<-+------>|P3.1/UCB0SCL    |
//          |                |       |          P1.0|--> LED
//
// Bhargavi Nisarga
// Texas Instruments Inc.
// April 2009
// Built with CCSv4 and IAR Embedded Workbench Version: 4.21
//******************************************************************************

#include <msp430.h>

unsigned char RXData;
unsigned char RXCompare;

int main(void)
{
  WDTCTL = WDTPW + WDTHOLD;                // Stop WDT
  P1OUT &= ~0x01;                         // P1.0 = 0
  P1DIR |= 0x01;                         // P1.0 output
  P3SEL |= 0x03;                         // Assign I2C pins to USCI_B0
  UCB0CTL1 |= UCSWRST;                   // Enable SW reset
  UCB0CTL0 = UCMST + UCMODE_3 + UCSYNC;    // I2C Master, synchronous mode
  UCB0CTL1 = UCSSEL_2 + UCSWRST;          // Use SMCLK
  UCB0BR0 = 12;                            // fSCL = SMCLK/12 = ~100kHz
  UCB0BR1 = 0;
  UCB0I2CSA = 0x48;                      // Slave Address is 048h
  UCB0CTL1 &= ~UCSWRST;                   // Clear SW reset, resume operation
  UCB0IE |= UCRXIE;                      // Enable RX interrupt
  RXCompare = 0x0;                         // Used to check incoming data

  while (1)
  {
while (UCB0CTL1 & UCTXSTP);          // Ensure stop condition got sent
UCB0CTL1 |= UCTXSTT;                   // I2C start condition
while(UCB0CTL1 & UCTXSTT);             // Start condition sent?
UCB0CTL1 |= UCTXSTP;                   // I2C stop condition

__bis_SR_register(LPM0_bits + GIE);    // Enter LPM0, enable interrupts
__no_operation();                      // For debugger

if (RXData != RXCompare)             // Trap CPU if wrong
{
   P1OUT |= 0x01;                      // P1.0 = 1
   while(1);
}

RXCompare++;                         // Increment correct RX value
  }
}

// USCI_B0 Data ISR
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = USCI_B0_VECTOR
__interrupt void USCI_B0_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(USCI_B0_VECTOR))) USCI_B0_ISR (void)
#else
#error Compiler not supported!
#endif
{
  switch(__even_in_range(UCB0IV,12))
  {
  case  0: break;                         // Vector  0: No interrupts
  case  2: break;                         // Vector  2: ALIFG
  case  4: break;                         // Vector  4: NACKIFG
  case  6: break;                         // Vector  6: STTIFG
  case  8: break;                         // Vector  8: STPIFG
  case 10:                               // Vector 10: RXIFG
RXData = UCB0RXBUF;                   // Get RX data
__bic_SR_register_on_exit(LPM0_bits); // Exit active CPU
break;
  case 12: break;                         // Vector 12: TXIFG
  default: break;
  }
}

只看该作者 · 2015-5-27 17:14

你这个是接收端程序，注意检查SCL这条线上接没接上拉电阻

只看该作者 · 2015-5-27 20:46

ayl439 发表于 2015-5-27 17:14
你这个是接收端程序，注意检查SCL这条线上接没接上拉电阻

不好意思，上传错了程序。现在这个是发送程序了。
//******************************************************************************
//  MSP430F552x Demo - USCI_B0 I2C Master TX single bytes to MSP430 Slave
//
//  Description: This demo connects two MSP430's via the I2C bus. The master
//  transmits to the slave. This is the master code. It continuously
//  transmits 00h, 01h, ..., 0ffh and demonstrates how to implement an I2C
//  master transmitter sending a single byte using the USCI_B0 TX interrupt.
//  ACLK = n/a, MCLK = SMCLK = BRCLK = default DCO = ~1.045MHz
//
// ***to be used with "MSP430F55xx_uscib0_i2c_07.c" ***
//
//                               /|\  /|\
//             MSP430F5529    10k  10k    MSP430F5529
//                slave       | |       master
//          ----------------- | | -----------------
//          -|XIN  P3.0/UCB0SDA|<-|----+->|P3.0/UCB0SDA  XIN|-
//          |                |  |    |                |
//          -|XOUT          |  |    |          XOUT|-
//          |    P3.1/UCB0SCL|<-+------>|P3.1/UCB0SCL    |
//          |                |       |                |
//
// Bhargavi Nisarga
// Texas Instruments Inc.
// April 2009
// Built with CCSv4 and IAR Embedded Workbench Version: 4.21
//******************************************************************************

#include <msp430.h>

unsigned char TXData;
unsigned char TXByteCtr;

int main(void)
{
  WDTCTL = WDTPW + WDTHOLD;                // Stop WDT
  P3SEL |= 0x03;                         // Assign I2C pins to USCI_B0
  UCB0CTL1 |= UCSWRST;                   // Enable SW reset
  UCB0CTL0 = UCMST + UCMODE_3 + UCSYNC;    // I2C Master, synchronous mode
  UCB0CTL1 = UCSSEL_2 + UCSWRST;          // Use SMCLK, keep SW reset
  UCB0BR0 = 12;                            // fSCL = SMCLK/12 = ~100kHz
  UCB0BR1 = 0;
  UCB0I2CSA = 0x48;                      // Slave Address is 048h
  UCB0CTL1 &= ~UCSWRST;                   // Clear SW reset, resume operation
  UCB0IE |= UCTXIE;                      // Enable TX interrupt

  TXData = 0x01;                         // Holds TX data

  while (1)
  {
TXByteCtr = 1;                         // Load TX byte counter

while (UCB0CTL1 & UCTXSTP);          // Ensure stop condition got sent
UCB0CTL1 |= UCTR + UCTXSTT;          // I2C TX, start condition

__bis_SR_register(LPM0_bits + GIE);    // Enter LPM0 w/ interrupts
__no_operation();                      // Remain in LPM0 until all data
                                          // is TX'd

TXData++;                            // Increment data byte
  }
}

//------------------------------------------------------------------------------
// The USCIAB0_ISR is structured such that it can be used to transmit any
// number of bytes by pre-loading TXByteCtr with the byte count.
//------------------------------------------------------------------------------
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = USCI_B0_VECTOR
__interrupt void USCI_B0_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(USCI_B0_VECTOR))) USCI_B0_ISR (void)
#else
#error Compiler not supported!
#endif
{
  switch(__even_in_range(UCB0IV,12))
  {
  case  0: break;                         // Vector  0: No interrupts
  case  2: break;                         // Vector  2: ALIFG
  case  4: break;                         // Vector  4: NACKIFG
  case  6: break;                         // Vector  6: STTIFG
  case  8: break;                         // Vector  8: STPIFG
  case 10: break;                         // Vector 10: RXIFG
  case 12:                               // Vector 12: TXIFG
if (TXByteCtr)                         // Check TX byte counter
{
   UCB0TXBUF = TXData;                // Load TX buffer
   TXByteCtr--;                         // Decrement TX byte counter
}
else
{
   UCB0CTL1 |= UCTXSTP;                // I2C stop condition
   UCB0IFG &= ~UCTXIFG;                // Clear USCI_B0 TX int flag
   __bic_SR_register_on_exit(LPM0_bits); // Exit LPM0
}
break;
  default: break;
  }
}
但是这个发送程序也还是不行，我自己给他加了上拉的代码，还是测不到输出的时钟信号。

只看该作者 · 2015-5-27 20:47

ayl439 发表于 2015-5-27 17:14
你这个是接收端程序，注意检查SCL这条线上接没接上拉电阻

我加了这两句，
P3REN |= BIT2;
  P3OUT |= BIT2;

  WDTCTL = WDTPW + WDTHOLD;
还是不行。

1万 · 2015-5-27 20:51

感觉应该插入代码那种才对啊，这样就能看清楚那个图了。

只看该作者 · 2015-5-27 21:09

643757107 发表于 2015-5-27 20:51
感觉应该插入代码那种才对啊，这样就能看清楚那个图了。

插入代码？没理解，请说明一下，谢谢。

1万 · 2015-5-27 21:11

楼上说的插入代码，是说的楼主应该发帖时候以插入代码的方式发那段代码吧，不是说的程序内容吧。

只看该作者 · 2015-5-27 21:13

yiyigirl2014 发表于 2015-5-27 21:11
楼上说的插入代码，是说的楼主应该发帖时候以插入代码的方式发那段代码吧，不是说的程序内容吧。 ...

懂了，谢谢。

只看该作者 · 2015-5-27 21:15

复制

//******************************************************************************

//  MSP430F552x Demo - USCI_B0 I2C Master TX single bytes to MSP430 Slave

//

//  Description: This demo connects two MSP430's via the I2C bus. The master

//  transmits to the slave. This is the master code. It continuously

//  transmits 00h, 01h, ..., 0ffh and demonstrates how to implement an I2C

//  master transmitter sending a single byte using the USCI_B0 TX interrupt.

//  ACLK = n/a, MCLK = SMCLK = BRCLK = default DCO = ~1.045MHz

//

// ***to be used with "MSP430F55xx_uscib0_i2c_07.c" ***

//

//                                /|\  /|\

//                MSP430F5529     10k  10k     MSP430F5529

//                   slave         |    |         master

//             -----------------   |    |   -----------------

//           -|XIN  P3.0/UCB0SDA|<-|----+->|P3.0/UCB0SDA  XIN|-

//            |                 |  |       |                 |

//           -|XOUT             |  |       |             XOUT|-

//            |     P3.1/UCB0SCL|<-+------>|P3.1/UCB0SCL     |

//            |                 |          |                 |

//

//   Bhargavi Nisarga

//   Texas Instruments Inc.

//   April 2009

//   Built with CCSv4 and IAR Embedded Workbench Version: 4.21

//******************************************************************************



#include <msp430.h>



unsigned char TXData;

unsigned char TXByteCtr;



int main(void)

{

  WDTCTL = WDTPW + WDTHOLD;                 // Stop WDT

  P3SEL |= BIT0 + BIT1;                            // Assign I2C pins to USCI_B0

  P3DIR |= BIT0 + BIT1;

  P3OUT |= BIT0 + BIT1;

  

  UCB0CTL1 |= UCSWRST;                      // Enable SW reset

  UCB0CTL0 = UCMST + UCMODE_3 + UCSYNC;     // I2C Master, synchronous mode

  UCB0CTL1 = UCSSEL_2 + UCSWRST;            // Use SMCLK, keep SW reset

  UCB0BR0 = 12;                             // fSCL = SMCLK/12 = ~100kHz

  UCB0BR1 = 0;

  UCB0I2CSA = 0x48;                         // Slave Address is 048h

  UCB0CTL1 &= ~UCSWRST;                     // Clear SW reset, resume operation

  //UCB0IE |= UCTXIE;                         // Enable TX interrupt



  TXData = 0xFF;                            // Holds TX data



  while (1)

  {

    TXByteCtr = 1;                          // Load TX byte counter



    while (UCB0CTL1 & UCTXSTP);             // Ensure stop condition got sent

    UCB0CTL1 |= UCTR + UCTXSTT;             // I2C TX, start condition

   

    //__bis_SR_register(LPM0_bits + GIE);     // Enter LPM0 w/ interrupts

    //__no_operation();                       // Remain in LPM0 until all data

    UCB0TXBUF = TXData;                                         // is TX'd     

  }

}