是可以用定时器中断的,下面是摘自数据手册的话,您可以查看数据手册。<br />Timer 0 and 1 interrupts are generated by the TF0 and<br />TF1 flags in the tcon register, which are set by the<br />rollover of Timer 0 and 1, respectively. When an interrupt<br />is generated, the flag that caused this interrupt is cleared<br />if Core8051 has accessed the corresponding interrupt<br />service vector. This can be done only if the interrupt is<br />enabled in the ien0 register.
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