gpio_init_type gpio_init_struct = {0};
tmr_output_config_type tmr_output_struct;
crm_clocks_freq_type crm_clocks_freq_struct = {0};
uint16_t timer_period = 0;
uint16_t channel1_pulse = 0, channel2_pulse = 0, channel3_pulse = 0, channel4_pulse = 0;
u8 test;
int main(void)
{
/* congfig the system clock */
system_clock_config();
/* init at start board */
at32_board_init();
/* get system clock */
crm_clocks_freq_get(&crm_clocks_freq_struct);
/* enable tmr1/gpioa/gpiob clock */
crm_periph_clock_enable(CRM_TMR1_PERIPH_CLOCK, TRUE);
crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
/* timer1 output pin(TMR1_CH1_PA8) Configuration */
gpio_init_struct.gpio_pins = GPIO_PINS_10;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_init(GPIOA, &gpio_init_struct);
timer_period = (crm_clocks_freq_struct.sclk_freq / 17570 ) - 1;
/* compute c1dt value to generate a duty cycle at 50% for channel 1 and 1c */
channel1_pulse = (uint16_t)(((uint32_t) 5 * (timer_period - 1)) / 10);
/* tmr base configuration */
tmr_repetition_counter_set(TMR1, PWM_NUM-1);
tmr_base_init(TMR1, timer_period, 0);
tmr_cnt_dir_set(TMR1, TMR_COUNT_UP);
tmr_clock_source_div_set(TMR1, TMR_CLOCK_DIV1);
/* channel1 configuration in output mode */
tmr_output_default_para_init(&tmr_output_struct);
tmr_output_struct.oc_mode = TMR_OUTPUT_CONTROL_PWM_MODE_B;
tmr_output_struct.oc_output_state = TRUE;
tmr_output_struct.oc_polarity = TMR_OUTPUT_ACTIVE_HIGH;
tmr_output_struct.oc_idle_state = TRUE;
tmr_output_channel_config(TMR1, TMR_SELECT_CHANNEL_3, &tmr_output_struct);
tmr_channel_value_set(TMR1, TMR_SELECT_CHANNEL_3, channel1_pulse);
/* one cycle mode selection */
tmr_one_cycle_mode_enable(TMR1, TRUE);
/* ADVTMR output enable */
tmr_output_enable(TMR1, TRUE);
tmr_channel_enable(TMR1, TMR_SELECT_CHANNEL_3, TRUE);
// tmr_output_channel_immediately_set(TMR1, TMR_SELECT_CHANNEL_3, TRUE);
// tmr_output_channel_switch_set(TMR1, TMR_SELECT_CHANNEL_3, TRUE);
while(1)
{
tmr_counter_enable(TMR1, TRUE);
delay_ms(100);
}
}
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