stm32f030c8 串口通信波特率不对困惑求解惑

只看该作者 · 2015-11-10 10:24

本帖最后由 llb560 于 2015-11-10 10:29 编辑

我用stm32f030c8串口1 通信发出的数据不对，我用的是内部晶振
之前也是用串口1在A口是通信正常，由于第二版把串口1挪到B口通信就不正常了,串口能发出，比我我发送0X55，结果发出的是 0x77，0x74，而且不稳定。有大侠给指点迷津，不胜感激！
串口设置如下
static void UART_Config(void)
{
      // UART1 ->485
      GPIO_InitTypeDef  GPIO_InitStructure;
      USART_InitTypeDef USART_InitStructure;
      NVIC_InitTypeDef       NVIC_InitStructure;

      // UART1 485
      NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
      NVIC_InitStructure.NVIC_IRQChannelPriority = 2;
      NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
      NVIC_Init(&NVIC_InitStructure);

      RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
      RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE );
      //RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, ENABLE);
// RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, DISABLE);

      GPIO_PinAFConfig(GPIOB,GPIO_PinSource6,GPIO_AF_0);
      GPIO_PinAFConfig(GPIOB,GPIO_PinSource7,GPIO_AF_0);

      GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7;
      GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
      GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
      GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
      GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
      GPIO_Init(GPIOB, &GPIO_InitStructure);
  // RCC_USARTCLKConfig( RCC_USART1CLK_PCLK );
  //  USART_DeInit( USART1 );

// 波特率 115200  8 data，  1 stop，  N
      USART_InitStructure.USART_BaudRate = 19200;
      USART_InitStructure.USART_WordLength = USART_WordLength_8b;
      USART_InitStructure.USART_StopBits = USART_StopBits_1;
      USART_InitStructure.USART_Parity = USART_Parity_No;
      USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
      USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
      USART_Init(RS485_UART, &USART_InitStructure);

      USART1->BRR = 205;  // 波特率单独计算
      USART_Cmd(RS485_UART, ENABLE);
      USART_ITConfig(RS485_UART,USART_IT_RXNE,ENABLE);



}
系统时钟设置如下
static void SetSysClock(void)
{
  /* SYSCLK, HCLK, PCLK configuration ----------------------------------------*/

  /* At this stage the HSI is already enabled */

  /* Enable Prefetch Buffer and set Flash Latency */
  FLASH->ACR = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY;

  /* HCLK = SYSCLK */
  RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;

  /* PCLK = HCLK */
  RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE_DIV1;

  /* PLL configuration = (HSI/2) * 12 = ~48 MHz */
  RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL));
  RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSI_DIV2 | RCC_CFGR_PLLMUL12);

  /* Enable PLL */
  RCC->CR |= RCC_CR_PLLON;

  /* Wait till PLL is ready */
  while((RCC->CR & RCC_CR_PLLRDY) == 0)
  {
  }

  /* Select PLL as system clock source */
  RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
  RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;

  /* Wait till PLL is used as system clock source */
  while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)
  {
  }
}