Hi,
Arm documentation \"ARM Security Technology Building a Secure System using TrustZone Technology\" says: The mechanisms by which the physical processor can enter monitor mode from the Normal world are tightly controlled, and are all viewed as exceptions to the monitor mode software. The entry to monitor can be triggered by software executing a dedicated instruction, the Secure Monitor Call (SMC) instruction, or by a subset of the hardware exception mechanisms. The IRQ, FIQ, external Data Abort, and external Prefetch Abort exceptions can all be configured to cause the processor to switch into monitor mode.
What control do you do?
If an attacker obtains root privileges, can he access the safe world? Is the secure monitor only protected by privilege level?
Thanks |
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